Abstract: The present disclosure discloses a manufacturing method of a pixel structure of a reflective display comprising: providing a substrate; forming a shielding layer on the substrate; forming a low reflective layer on the shielding layer; and forming a reflective layer on the low reflective layer, wherein the reflective layer comprises a plurality of reflection regions, the plurality of reflection regions are arranged at intervals, and a part of the low reflective layer is exposed between the plurality of reflection regions. In the present disclosure, the reflection of light in the gap between the pixels is avoided by the low reflective layer, such that the notice of liquid crystal disturbance by human eyes is reduced, and a reflective display with good display function and low power consumption is implemented.

Abstract: The present disclosure discloses a pixel structure of a reflective display comprising a substrate, a shielding layer, a low reflective layer, and a reflective layer. The shielding layer is disposed on the substrate. The low reflective layer is disposed on the shielding layer. The reflective layer is disposed on the low reflective layer, wherein the reflective layer comprises a plurality of reflection regions, the plurality of reflection regions are arranged at intervals. A part of the low reflective layer is exposed between the plurality of reflection regions. In the present disclosure, the reflection of light in the gap between the pixels is avoided by the low reflective layer, such that the notice of liquid crystal disturbance by human eyes is reduced, and a reflective display with good display function and low power consumption is implemented.

Abstract: A display panel including a substrate, a first metal layer, a first insulating layer, a second metal layer, a second insulating layer and a third metal layer is provided. The first metal layer is disposed on the substrate and includes a first storage electrode. The first insulating layer is disposed on the first metal layer. The second metal layer is disposed on the first insulating layer and includes a second storage electrode. The second insulating layer is disposed on the second metal layer. The third metal layer is disposed on the second insulating layer and includes a third storage electrode. A first storage capacitance is constituted by the first and second storage electrode as well as the first insulating layer located between thereof, and a second storage capacitance is constituted by the second and third storage electrode as well as the second insulating layer located between thereof.

Abstract: The present disclosure discloses a jump connection structure of a reflective display comprising a substrate, a shielding layer, a low reflective layer, an organic layer, a first transparent conductive layer, and a first reflective layer. The shielding layer is disposed on the substrate. The low reflective layer is disposed on the shielding layer. The organic layer is disposed on the low reflective layer, wherein the organic layer and the low reflective layer have a first via, and a part of the shielding layer is exposed from the first via. The first transparent conductive layer is disposed on the exposed shielding layer. The first reflective layer is disposed on a top surface of the organic layer, a side surface of the organic layer, and the first transparent conductive layer. In the present disclosure, a reflective display with good display function and low power consumption is implemented by the jump connection structure.

Abstract: A pixel structure having a first gray scale display region and a second gray scale display region is provided. The first and the second gray scale display region respectively comprises two first display blocks and a second display block located therebetween. The pixel structure comprises first conductive electrodes, a second conductive electrode, a first active component and a second active component. The first conductive electrodes respectively disposed in the two first display blocks of the first gray scale display region are connected. The second conductive electrode is disposed in the second gray scale display region. The first active component is electrically connected to the first conductive electrodes by a first contact window located at one of the two first display blocks. The second active component is electrically connected to the second conductive electrode by a second contact window located at the second display block.

Abstract: A thin film solar cell including a substrate, an insulating layer, a first electrode layer, a photovoltaic conversion layer and a second electrode layer is provided. The insulating layer is disposed on the substrate and includes a plurality of microstructures. An orthographic projection of the plurality of microstructures is a regular geometric shape or an irregular geometric shape regarding to a normal direction of the substrate. The first electrode layer is disposed on the insulating layer. A thickness of the first electrode layer is less than 1 ?m or is equal to 1 ?m. The photovoltaic conversion layer is disposed on the first electrode layer. The second electrode layer is disposed on the photovoltaic conversion layer.

Abstract: A manufacturing method of a display panel including following steps is provided. Providing a substrate. Forming a first metal layer including a first storage electrode on the substrate. Forming a first insulating layer on the first metal layer. Forming a second metal layer including a second storage electrode on the first insulating layer. Forming a second insulating layer on the second metal layer. Forming a third metal layer including a third storage electrode on the second insulating layer. A first storage capacitance is constituted by the first storage electrode and the second storage electrode as well as the first insulating layer located between the first storage electrode and the second storage electrode, and a second storage capacitance is constituted by the second storage electrode and the third storage electrode as well as the second insulating layer located between the second storage electrode and the third storage electrode.

Abstract: A pixel structure having a first gray scale display region and a second gray scale display region is provided. The first and the second gray scale display region respectively comprises two first display blocks and a second display block located therebetween. The pixel structure comprises first conductive electrodes, a second conductive electrode, a first active component and a second active component. The first conductive electrodes respectively disposed in the two first display blocks of the first gray scale display region are connected. The second conductive electrode is disposed in the second gray scale display region. The first active component is electrically connected to the first conductive electrodes by a first contact window located at one of the two first display blocks. The second active component is electrically connected to the second conductive electrode by a second contact window located at the second display block.

Abstract: A pixel structure having a first gray scale display region and a second gray scale display region is provided. The first and the second gray scale display region respectively comprises two first display blocks and a second display block located therebetween. The pixel structure comprises first conductive electrodes, a second conductive electrode, a first active component and a second active component. The first conductive electrodes respectively disposed in the two first display blocks of the first gray scale display region are connected. The second conductive electrode is disposed in the second gray scale display region. The first active component is electrically connected to the first conductive electrodes by a first contact window located at one of the two first display blocks. The second active component is electrically connected to the second conductive electrode by a second contact window located at the second display block.

Abstract: A pixel structure having a first gray scale display region and a second gray scale display region is provided. The first and the second gray scale display region respectively comprises two first display blocks and a second display block located therebetween. The pixel structure comprises first conductive electrodes, a second conductive electrode, a first active component and a second active component. The first conductive electrodes respectively disposed in the two first display blocks of the first gray scale display region are connected. The second conductive electrode is disposed in the second gray scale display region. The first active component is electrically connected to the first conductive electrodes by a first contact window located at one of the two first display blocks. The second active component is electrically connected to the second conductive electrode by a second contact window located at the second display block.

Abstract: A thin film solar cell including a substrate, an insulating layer, a first electrode layer, a photovoltaic conversion layer and a second electrode layer is provided. The insulating layer is disposed on the substrate and includes a plurality of microstructures. An orthographic projection of the plurality of microstructures is a regular geometric shape or an irregular geometric shape regarding to a normal direction of the substrate. The first electrode layer is disposed on the insulating layer. A thickness of the first electrode layer is less than 1 ?m or is equal to 1 ?m. The photovoltaic conversion layer is disposed on the first electrode layer. The second electrode layer is disposed on the photovoltaic conversion layer.

Abstract: A co-gate electrode between pixels structure includes a first pixel and a second pixel. The first pixel has a first control switch is electrically connected to a main control switch. The main control switch selectively receives an external voltage and then transmits the external voltage to the first control switch. The first control switch selectively receives the external voltage, lest the external voltage transmitted to the first pixel to charge or discharge establish a voltage drop. The second pixel has a second control switch, which is electrically connected to the main control switch to selectively receive the external voltage transmitted by the main control switch, lest the external voltage that is transmitted to the second pixel to charge or discharge establish a voltage drop. The present invention is used for a panel with pixels of small area and high resolution.

Abstract: A co-gate electrode between pixels structure includes a first pixel and a second pixel. The first pixel has a first control switch is electrically connected to a main control switch. The main control switch selectively receives an external voltage and then transmits the external voltage to the first control switch. The first control switch selectively receives the external voltage, lest the external voltage transmitted to the first pixel to charge or discharge establish a voltage drop. The second pixel has a second control switch, which is electrically connected to the main control switch to selectively receive the external voltage transmitted by the main control switch, lest the external voltage that is transmitted to the second pixel to charge or discharge establish a voltage drop. The present invention is used for a panel with pixels of small area and high resolution.

Abstract: The present invention provides a liquid crystal display module, which comprises a bottom substrate, one or more reflective member, an array bump-structure layer, a liquid crystal layer, and a top substrate. The array bump-structure layer comprises one or more first bump region and one or mode second bump region. The second bump region is disposed on the reflective member correspondingly. By using the reflective member, the problem of complicated fabrication of the array bump layer having a plurality of sloping angles according to the prior art can be avoided.

Abstract: The present invention provides a liquid crystal display module, which comprises a bottom substrate, one or more reflective member, an array bump-structure layer, a liquid crystal layer, and a top substrate. The array bump-structure layer comprises one or more first bump region and one or mode second bump region. The second bump region is disposed on the reflective member correspondingly. By using the reflective member, the problem of complicated fabrication of the array bump layer having a plurality of sloping angles according to the prior art can be avoided.

Abstract: The present invention provides a thin-film transistor structure, which comprises a substrate, a first metal layer, a first buffer layer, a semiconductor layer, a second metal layer, a second buffer layer, and a third metal layer. The second metal layer includes a gap region; the semiconductor layer includes a channel region. The present invention uses the first and third metal layers to form double gates. By controlling the channel region using the double-gate structure, the turn-on current of the thin-film transistor can be enhanced and thus achieving the efficacy of improving the driving efficiency of the device.

Abstract: A first etching stop layer and an active layer are formed on an inner surface of a first glass substrate, and a second etching stop layer and a cover layer are formed on an inner surface of a second glass substrate. A display media is formed between the first glass substrate and the second glass substrate. A first passivation layer is formed on an outer surface of the second glass substrate. A first etching process is performed to expose the first etching stop layer. A first flexible substrate is formed on the exposed first etching stop layer, and a second passivation layer is formed on the first flexible substrate. The first passivsation layer is removed. A second etching process is performed to expose the second etching stop layer. A second flexible substrate is formed on the exposed second etching stop layer, and the second passivation layer is removed.

Abstract: A first etching stop layer and an active layer are formed on an inner surface of a first glass substrate, and a second etching stop layer and a cover layer are formed on an inner surface of a second glass substrate. A display media is formed between the first glass substrate and the second glass substrate. A first passivation layer is formed on an outer surface of the second glass substrate. A first etching process is performed to expose the first etching stop layer. A first flexible substrate is formed on the exposed first etching stop layer, and a second passivation layer is formed on the first flexible substrate. The first passivsation layer is removed. A second etching process is performed to expose the second etching stop layer. A second flexible substrate is formed on the exposed second etching stop layer, and the second passivation layer is removed.

Abstract: An n-stage driving module with a common control node according to the present invention is revealed. The n-stage driving module comprises a plurality of output units, a forward input unit and a reverse input unit. The output units are all coupled to a control node to share the control node. The output units output forward scanning signals sequentially according to the charge of the control node when the control node is charged by the forward input unit. The output units output reverse scanning signals sequentially according to the charge of the control node when the control node is charged by the reverse input unit. Thus, the present invention is provided to output forward or reverse scanning signals from the output units by sharing the control node so as to decrease the circuit area in the n-stage driving module.

Abstract: The invention provides a bidirectional scanning driving circuit, which comprises N stages of driving modules. Driving module comprises an output unit, a forward input unit, and a reverse input unit. For the n-th stage driving module, the forward input unit receives a first input voltage and a front forward scan signal of any of the driving modules lower than or equal to (n?2)th stage for charging or discharging a control node of the output unit. The reverse input unit receives a second input voltage and a back reverse scan signal of any of the driving modules higher than or equal to (n+2)th stage for charging or discharging the control node of the output unit. When the forward input unit is charging the output unit, the output unit outputs a forward scan signal; when the reverse input unit is charging the output unit, the output unit outputs a reverse scan signal.