Patents by Inventor Che-Yi Wu

Che-Yi Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162051
    Abstract: Some implementations described herein include systems and techniques for fabricating a stacked die product. The systems and techniques include using a supporting fill mixture that includes a combination of types of composite particulates in a lateral gap region of a stack of semiconductor substrates and along a perimeter region of the stack of semiconductor substrates. One type of composite particulate included in the combination may be a relatively smaller size and include a smooth surface, allowing the composite particulate to ingress deep into the lateral gap region. Properties of the supporting fill mixture including the combination of types of composite particulates may control thermally induced stresses during downstream manufacturing to reduce a likelihood of defects in the supporting fill mixture and/or the stack of semiconductor substrates.
    Type: Application
    Filed: April 27, 2023
    Publication date: May 16, 2024
    Inventors: Kuo-Ming WU, Hau-Yi HSIAO, Kai-Yun YANG, Che Wei YANG, Sheng-Chau CHEN, Chung-Yi YU, Cheng-Yuan TSAI
  • Publication number: 20240118316
    Abstract: A probe card and a manufacturing method of a probe card are provided. The probe card includes a probe head, first and second substrates, an insulating component, and an adhesive member. The second substrate is disposed between the probe head and the first substrate, and is disposed on the first substrate. The second substrate faces the first substrate and includes second contacts. The second contacts are electrically connected to first contacts of the first substrate. The insulating component is disposed between the first substrate and the second substrate, and disposed at an outer side of the second contacts. The adhesive member is disposed on the first substrate, arranged on at least a part of the side surface of the second substrate, and disposed at an outer side of the insulating component.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Applicant: MPI Corporation
    Inventors: Chin-Yi Lin, Che-Wei Lin, Ting-Ju Wu, Chien-Kai Hung
  • Publication number: 20240099154
    Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Applicant: UNITED MICROELECTRONICS CORP
    Inventors: Hui-Lin Wang, Si-Han Tsai, Dong-Ming Wu, Chen-Yi Weng, Ching-Hua Hsu, Ju-Chun Fan, Yi-Yu Lin, Che-Wei Chang, Po-Kai Hsu, Jing-Yin Jhang
  • Publication number: 20240084455
    Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.
    Type: Application
    Filed: February 8, 2023
    Publication date: March 14, 2024
    Inventors: Che Wei YANG, Chih Cheng SHIH, Kuo Liang LU, Yu JIANG, Sheng-Chan LI, Kuo-Ming WU, Sheng-Chau CHEN, Chung-Yi YU, Cheng-Yuan TSAI
  • Publication number: 20240066113
    Abstract: The present invention relates to the mRNA vaccine of coronavirus spike protein with deletion of glycosites in the receptor binding domain (RBD), the subunit 1 (S1) domain, or the subunit 2 (S2) domain, or a combination thereof. The vaccine elicits broadly protective immune responses coronavirus and variants thereof.
    Type: Application
    Filed: April 12, 2022
    Publication date: February 29, 2024
    Inventors: Chi-Huey WONG, Chung-Yi WU, Che MA, Chen-Yu FAN
  • Patent number: 10942803
    Abstract: A method for performing data processing for error handling in a memory device, the memory device and the controller thereof, and the associated electronic device are provided. The method may include: programming a codeword of a set of data into a non-volatile (NV) memory, wherein the codeword includes the set of data and a parity-check code; reading the codeword from a volatile memory to generate readout data of the codeword; determining whether the readout data is correct according to the readout version of the set of data and the readout version of the parity-check code; and when determining that the readout data is correct, outputting the readout version of the set of data as the set of data for further usage of the processing circuit, otherwise, sending a predetermined signal to the processing circuit and storing error information regarding the set of data into a register of the controller.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: March 9, 2021
    Assignee: Silicon Motion, Inc.
    Inventors: Hung-En Hsieh, Che-Yi Wu
  • Publication number: 20190065305
    Abstract: A method for performing data processing for error handling in a memory device, the memory device and the controller thereof, and the associated electronic device are provided. The method may include: programming a codeword of a set of data into a non-volatile (NV) memory, wherein the codeword includes the set of data and a parity-check code; reading the codeword from a volatile memory to generate readout data of the codeword; determining whether the readout data is correct according to the readout version of the set of data and the readout version of the parity-check code; and when determining that the readout data is correct, outputting the readout version of the set of data as the set of data for further usage of the processing circuit, otherwise, sending a predetermined signal to the processing circuit and storing error information regarding the set of data into a register of the controller.
    Type: Application
    Filed: January 9, 2018
    Publication date: February 28, 2019
    Inventors: Hung-En Hsieh, Che-Yi Wu