Patents by Inventor Che-Yun Lin
Che-Yun Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250074776Abstract: The present invention provides a method for preparing an activated carbon, which includes impregnating a carbonaceous material with carbonated water; and exposing the carbonaceous material to microwave radiation to produce the activated carbon.Type: ApplicationFiled: September 1, 2023Publication date: March 6, 2025Inventors: Feng-Huei LIN, Chih-Chieh CHEN, Chih-Wei LIN, Chi-Hsien CHEN, Yue-Liang GUO, Ching-Yun CHEN, Chia-Ting CHANG, Che-Yung KUAN, Zhi-Yu CHEN, I-Hsuan YANG
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Publication number: 20240395695Abstract: Metal insulator metal capacitors are described. In an example, a capacitor includes a first electrode plate, and a first capacitor dielectric on the first electrode plate. A second electrode plate is on the first capacitor dielectric and is over and parallel with the first electrode plate, and a second capacitor dielectric is on the second electrode plate. A third electrode plate is on the second capacitor dielectric and is over and parallel with the second electrode plate, and a third capacitor dielectric is on the third electrode plate. A fourth electrode plate is on the third capacitor dielectric and is over and parallel with the third electrode plate. In another example, a capacitor includes a first electrode, a capacitor dielectric on the first electrode, and a second electrode on the capacitor dielectric. The capacitor dielectric includes a plurality of alternating first dielectric layers and second dielectric layers.Type: ApplicationFiled: August 5, 2024Publication date: November 28, 2024Inventors: Aaron J. WELSH, Christopher M. PELTO, David J. TOWNER, Mark A. BLOUNT, Takayoshi ITO, Dragos SEGHETE, Christopher R. RYDER, Stephanie F. SUNDHOLM, Chamara ABEYSEKERA, Anil W. DEY, Che-Yun LIN, Uygar E. AVCI
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Publication number: 20240395696Abstract: Metal insulator metal capacitors are described. In an example, a capacitor includes a first electrode plate, and a first capacitor dielectric on the first electrode plate. A second electrode plate is on the first capacitor dielectric and is over and parallel with the first electrode plate, and a second capacitor dielectric is on the second electrode plate. A third electrode plate is on the second capacitor dielectric and is over and parallel with the second electrode plate, and a third capacitor dielectric is on the third electrode plate. A fourth electrode plate is on the third capacitor dielectric and is over and parallel with the third electrode plate. In another example, a capacitor includes a first electrode, a capacitor dielectric on the first electrode, and a second electrode on the capacitor dielectric. The capacitor dielectric includes a plurality of alternating first dielectric layers and second dielectric layers.Type: ApplicationFiled: August 7, 2024Publication date: November 28, 2024Inventors: Aaron J. WELSH, Christopher M. PELTO, David J. TOWNER, Mark A. BLOUNT, Takayoshi ITO, Dragos SEGHETE, Christopher R. RYDER, Stephanie F. SUNDHOLM, Chamara ABEYSEKERA, Anil W. DEY, Che-Yun LIN, Uygar E. AVCI
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Publication number: 20240373644Abstract: An integrated circuit capacitor structure, includes a first electrode includes a cylindrical column, a ferroelectric layer around an exterior sidewall of the cylindrical column and a plurality of outer electrodes. The plurality of outer electrodes include a first outer electrode laterally adjacent to a first portion of an exterior of the ferroelectric layer and a second outer electrode laterally adjacent to a second portion of the exterior of the ferroelectric layer, wherein the second outer electrode is above the first outer electrode.Type: ApplicationFiled: July 19, 2024Publication date: November 7, 2024Applicant: Intel CorporationInventors: Nazila Haratipour, Sou-Chi Chang, Shriram Shivaraman, I-Cheng Tung, Tobias Brown-Heft, Devin R. Merrill, Che-Yun Lin, Seung Hoon Sung, Jack Kavalieros, Uygar Avci, Matthew V. Metz
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Patent number: 12107040Abstract: Metal insulator metal capacitors are described. In an example, a capacitor includes a first electrode plate, and a first capacitor dielectric on the first electrode plate. A second electrode plate is on the first capacitor dielectric and is over and parallel with the first electrode plate, and a second capacitor dielectric is on the second electrode plate. A third electrode plate is on the second capacitor dielectric and is over and parallel with the second electrode plate, and a third capacitor dielectric is on the third electrode plate. A fourth electrode plate is on the third capacitor dielectric and is over and parallel with the third electrode plate. In another example, a capacitor includes a first electrode, a capacitor dielectric on the first electrode, and a second electrode on the capacitor dielectric. The capacitor dielectric includes a plurality of alternating first dielectric layers and second dielectric layers.Type: GrantFiled: December 21, 2020Date of Patent: October 1, 2024Assignee: Intel CorporationInventors: Aaron J. Welsh, Christopher M. Pelto, David J. Towner, Mark A. Blount, Takayoshi Ito, Dragos Seghete, Christopher R. Ryder, Stephanie F. Sundholm, Chamara Abeysekera, Anil W. Dey, Che-Yun Lin, Uygar E. Avci
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Patent number: 12048165Abstract: An integrated circuit capacitor structure, includes a first electrode includes a cylindrical column, a ferroelectric layer around an exterior sidewall of the cylindrical column and a plurality of outer electrodes. The plurality of outer electrodes include a first outer electrode laterally adjacent to a first portion of an exterior of the ferroelectric layer and a second outer electrode laterally adjacent to a second portion of the exterior of the ferroelectric layer, wherein the second outer electrode is above the first outer electrode.Type: GrantFiled: June 26, 2020Date of Patent: July 23, 2024Assignee: Intel CorporationInventors: Nazila Haratipour, Sou-Chi Chang, Shriram Shivaraman, I-Cheng Tung, Tobias Brown-Heft, Devin R. Merrill, Che-Yun Lin, Seung Hoon Sung, Jack Kavalieros, Uygar Avci, Matthew V. Metz
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Publication number: 20220139772Abstract: Integrated circuit interconnect structures including an interconnect metallization feature with a liner material of a greater thickness between a fill metal and dielectric material, and of a lesser thickness between the fill metal and a lower-level interconnect metallization feature. The liner material may be substantially absent from an interface between the fill metal and the lower-level interconnect metallization feature. Liner material of reduced thickness at a bottom of the via may reduce via resistance and/or facilitate the use of a highly resistive liner material that may enhance the scalability of interconnect structures. In some embodiments, liner material is deposited upon dielectric surfaces with an area selective atomic layer deposition process. For single damascene implementations, both a via and a metal line may include a selectively deposited liner material.Type: ApplicationFiled: November 2, 2020Publication date: May 5, 2022Applicant: Intel CorporationInventors: Christoper Jezewski, Jiun-Ruey Chen, Miriam Reshotko, James M. Blackwell, Matthew Metz, Che-Yun Lin
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Publication number: 20220068794Abstract: Metal insulator metal capacitors are described. In an example, a capacitor includes a first electrode plate, and a first capacitor dielectric on the first electrode plate. A second electrode plate is on the first capacitor dielectric and is over and parallel with the first electrode plate, and a second capacitor dielectric is on the second electrode plate. A third electrode plate is on the second capacitor dielectric and is over and parallel with the second electrode plate, and a third capacitor dielectric is on the third electrode plate. A fourth electrode plate is on the third capacitor dielectric and is over and parallel with the third electrode plate. In another example, a capacitor includes a first electrode, a capacitor dielectric on the first electrode, and a second electrode on the capacitor dielectric. The capacitor dielectric includes a plurality of alternating first dielectric layers and second dielectric layers.Type: ApplicationFiled: December 21, 2020Publication date: March 3, 2022Inventors: Aaron J. WELSH, Christopher M. PELTO, David J. TOWNER, Mark A. BLOUNT, Takayoshi ITO, Dragos SEGHETE, Christopher R. RYDER, Stephanie F. SUNDHOLM, Chamara ABEYSEKERA, Anil W. DEY, Che-Yun LIN, Uygar E. AVCI
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Publication number: 20210408018Abstract: An integrated circuit capacitor structure, includes a first electrode includes a cylindrical column, a ferroelectric layer around an exterior sidewall of the cylindrical column and a plurality of outer electrodes. The plurality of outer electrodes include a first outer electrode laterally adjacent to a first portion of an exterior of the ferroelectric layer and a second outer electrode laterally adjacent to a second portion of the exterior of the ferroelectric layer, wherein the second outer electrode is above the first outer electrode.Type: ApplicationFiled: June 26, 2020Publication date: December 30, 2021Applicant: Intel CorporationInventors: Nazila Haratipour, Sou-Chi Chang, Shriram Shivaraman, I-Cheng Tung, Tobias Brown-Heft, Devin R. Merrill, Che-Yun Lin, Seung Hoon Sung, Jack Kavalieros, Uygar Avci, Matthew V. Metz
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Patent number: 9170374Abstract: The present invention provides a waveguide coupler configured to optically couple a strip waveguide to a first slot photonic crystal waveguide, wherein the slot photonic crystal waveguide has a lattice constant, an air hole diameter, a slot width and a first line defect waveguide width. The waveguide coupler includes a group reflective index taper having a second slot photonic crystal waveguide disposed between and aligned with the first slot photonic crystal waveguide and the strip waveguide. The second slot photonic crystal waveguide has a length, the lattice constant, the air hole diameter, the slot width, and a second line defect waveguide width that is substantially equal to the first line defect waveguide width adjacent to the first slot photonic crystal waveguide and decreases along the length of the second photonic crystal waveguide.Type: GrantFiled: June 13, 2012Date of Patent: October 27, 2015Assignee: BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEMInventors: Ray T. Chen, Che-Yun Lin
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Publication number: 20140219602Abstract: The present invention provides a waveguide coupler configured to optically couple a strip waveguide to a first slot photonic crystal waveguide, wherein the slot photonic crystal waveguide has a lattice constant, an air hole diameter, a slot width and a first line defect waveguide width. The waveguide coupler includes a group reflective index taper having a second slot photonic crystal waveguide disposed between and aligned with the first slot photonic crystal waveguide and the strip waveguide. The second slot photonic crystal waveguide has a length, the lattice constant, the air hole diameter, the slot width, and a second line defect waveguide width that is substantially equal to the first line defect waveguide width adjacent to the first slot photonic crystal waveguide and decreases along the length of the second photonic crystal waveguide.Type: ApplicationFiled: June 13, 2012Publication date: August 7, 2014Applicant: BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEMInventors: Ray T. Chen, Che-Yun Lin