Patents by Inventor Chee Hung Ben Choi

Chee Hung Ben Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10795854
    Abstract: A multivalued microprocessor including a multivalued processing module having a plurality of multivalued processing units constructed with multivalued logic gates. The microprocessor also includes a multivalued register file having a plurality of registers, wherein the registers are constructed with multivalued memory cells. The multivalued microprocessors utilizes two memory modules constructed with multivalued memory cells: one for storing solely instructions and one for storing solely data. A plurality of multivalued buses transmit multivalued data between the processing module, the register file, and the memory modules. A methodology for designing multivalued circuits that are constructed with multivalued logic gates and memory cells. The designs of multivalued memory cells, multivalued tristate buffers, and multivalued decoders using multivalued logic gates.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: October 6, 2020
    Assignee: Louisiana Tech Research Corporation
    Inventor: Chee Hung Ben Choi
  • Publication number: 20190018822
    Abstract: A multivalued microprocessor including a multivalued processing module having a plurality of multivalued processing units constructed with multivalued logic gates. The microprocessor also includes a multivalued register file having a plurality of registers, wherein the registers are constructed with multivalued memory cells. The multivalued microprocessors utilizes two memory modules constructed with multivalued memory cells: one for storing solely instructions and one for storing solely data. A plurality of multivalued buses transmit multivalued data between the processing module, the register file, and the memory modules. A methodology for designing multivalued circuits that are constructed with multivalued logic gates and memory cells. The designs of multivalued memory cells, multivalued tristate buffers, and multivalued decoders using multivalued logic gates.
    Type: Application
    Filed: May 21, 2018
    Publication date: January 17, 2019
    Inventor: Chee Hung Ben Choi
  • Patent number: 7134082
    Abstract: A method for individualizing an Internet/Intranet global directory and for adaptively changing the global directory structure based upon the individual alterations of multiple users. The method provides a default computer directory of prearranged files on a server computer. Client directory customization data is then provided to the server computer. With this information, the default directory is reconfigured into an individualized Internet/Intranet directory by modifying a copy of the default Internet/Intranet directory based upon the directory customization data. Further aspects include the step of updating the client directory customization data based upon user inputs; the step of collecting a history of client directory customization data; or the step of updating the default computer directory based on a history of client customization data.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: November 7, 2006
    Assignee: Louisiana Tech University Research Foundation as a division of the Louisiana Tech University Foundation
    Inventor: Chee Hung Ben Choi