Patents by Inventor Chee-Kong Awyong

Chee-Kong Awyong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7900118
    Abstract: A flash memory system comprises a group of pages each consisting of a plurality of memory zones with various sizes; a read/write controller for controlling reading or writing of data from or to one of the pages; an error correction unit including at least two ECC (Error Correction Code) engines each encoding or decoding the data for performing error detection and correction; and an ECC judgment unit for selecting one of the ECC engines on the basis of predetermined conditions.
    Type: Grant
    Filed: February 12, 2007
    Date of Patent: March 1, 2011
    Assignee: Phison Electronics Corp.
    Inventors: Yu-An Chang, Chee-Kong Awyong, Chin Ling Wang
  • Publication number: 20100058073
    Abstract: A storage system including a storage unit, a connector, and a controller is provided. A personal identification number (PIN) message digest and a cipher text are stored in the storage unit. When the storage system is connected to a host system through the connector, the controller requests a password from the host system and generates a message digest through a one-way hash function according to the password. After that, the controller determinates whether the message digest matches the PIN message digest. If the message digest matches the PIN message digest, the controller decrypts the cipher text in the storage unit through a first encryption/decryption function according to the password to obtain an encryption/decryption key. Eventually, the controller encrypts and decrypts user data through a second encryption/decryption function according to the encryption/decryption key. Thereby, the user data stored in the storage system can be effectively protected.
    Type: Application
    Filed: December 29, 2008
    Publication date: March 4, 2010
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Hon-Wai Ng, Ching-Wen Chang, Jiunn-Yeong Yang, Chee-Kong Awyong
  • Publication number: 20090259796
    Abstract: A data writing method for a non-volatile memory and a storage system and a controller using the same are provided. The data writing method includes executing a non-volatile memory writing program pre-stored in the non-volatile memory on a host, managing data desired to be written through the non-volatile memory writing program, executing a write-enabling command to temporarily disable a write protection of the non-volatile memory and executing a write command through the non-volatile memory writing program to write the data in a writing unit not recorded with any data in the non-volatile memory, and re-enabling the write protection after completing the writing by executing a write-protecting command. Accordingly, it is possible to avoid damage to the non-volatile memory due to multiple writings which are not desired in the non-volatile memory.
    Type: Application
    Filed: July 15, 2008
    Publication date: October 15, 2009
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Chee-Kong Awyong, Chung-Hsun Ma
  • Publication number: 20080195900
    Abstract: A flash memory system comprises a group of pages each consisting of a plurality of memory zones with various sizes; a read/write controller for controlling reading or writing of data from or to one of the pages; an error correction unit including at least two ECC (Error Correction Code) engines each encoding or decoding the data for performing error detection and correction; and an ECC judgment unit for selecting one of the ECC engines on the basis of predetermined conditions.
    Type: Application
    Filed: February 12, 2007
    Publication date: August 14, 2008
    Applicant: Phison Electronics Corp.
    Inventors: Yu-An Chang, Chee-Kong Awyong, Chin Ling Wang
  • Patent number: 7243186
    Abstract: A method of optimizing performance of a flash memory is provided. According to the method of the present invention, a page or a block can be selected as a unit for writing data to the flash memory. When the flash memory controller process the step of writing data into the flash memory, the volume of data is calculated for determining the time and frequency of moving and erasing data for both page and block as a unit. Based on the above result, the most appropriate method of writing data is selected to substantially improve speed of the writing process and also to reduce the frequency of erasing steps in order to extend the service life of the flash memory.
    Type: Grant
    Filed: November 15, 2006
    Date of Patent: July 10, 2007
    Assignee: Phison Electronics Corp.
    Inventors: Ming-Nen Liang, Chee-Kong Awyong
  • Patent number: 7225291
    Abstract: A storage controlling and judging methods of flash memory is provided. According to an aspect of the present invention, the flash memory comprises plurality sets of mother and child blocks for temporarily saving the written data in order to increase the saving/retrieving speed of the flash memory. According to another aspect of the present invention, the correlation concept of the mother and child block is used to substantially reduce the erase frequency for extending the service life of the flash memory.
    Type: Grant
    Filed: April 19, 2004
    Date of Patent: May 29, 2007
    Assignee: Phison Electronics Corp.
    Inventors: Ming-Nen Liang, Chee-Kong Awyong, Khein-Seng Pua
  • Publication number: 20070061506
    Abstract: A method of optimizing performance of a flash memory is provided. According to the method of the present invention, a page or a block can be selected as a unit for writing data to the flash memory. When the flash memory controller process the step of writing data into the flash memory, the volume of data is calculated for determining the time and frequency of moving and erasing data for both page and block as a unit. Based on the above result, the most appropriate method of writing data is selected to substantially improve speed of the writing process and also to reduce the frequency of erasing steps in order to extend the service life of the flash memory.
    Type: Application
    Filed: November 15, 2006
    Publication date: March 15, 2007
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Ming-Nen Liang, Chee-Kong Awyong
  • Patent number: 7159068
    Abstract: A method of writing data to a flash memory for efficiently managing the flash memory is provided. According to the method of the present invention, a page or a block can be selected as a unit for writing data to the flash memory. When a host, for instance, computer, card reader, cellular phone and alike, process the step of writing data into the flash memory, the volume of data is calculated for determining the time and frequency of moving and erasing data for both page and block as a unit. Based on the above result, the most appropriate method of writing data is selected to substantially improve speed of the writing process and also to reduce the frequency of erasing steps in order to extend the service life of the flash memory.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: January 2, 2007
    Assignee: Phison Electronics Corp.
    Inventors: Ming-Nen Liang, Chee-Kong Awyong
  • Publication number: 20050235097
    Abstract: A storage controlling and judging methods of flash memory is provided. According to an aspect of the present invention, the flash memory comprises plurality sets of mother and child blocks for temporarily saving the written data in order to increase the saving/retrieving speed of the flash memory. According to another aspect of the present invention, the correlation concept of the mother and child block is used to substantially reduce the erase frequency for extending the service life of the flash memory.
    Type: Application
    Filed: April 19, 2004
    Publication date: October 20, 2005
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Ming-Nen Liang, Chee-Kong Awyong, Khein-Seng Pua
  • Publication number: 20050138272
    Abstract: A method of writing data to a flash memory for efficiently managing the flash memory is provided. According to the method of the present invention, a page or a block can be selected as a unit for writing data to the flash memory. When a host, for instance, computer, card reader, cellular phone and alike, process the step of writing data into the flash memory, the volume of data is calculated for determining the time and frequency of moving and erasing data for both page and block as a unit. Based on the above result, the most appropriate method of writing data is selected to substantially improve speed of the writing process and also to reduce the frequency of erasing steps in order to extend the service life of the flash memory.
    Type: Application
    Filed: December 22, 2003
    Publication date: June 23, 2005
    Applicant: Phison Electronics Corp.
    Inventors: Ming-Nen Liang, Chee-Kong Awyong
  • Patent number: 6876579
    Abstract: A method of writing data to a large block of a flash memory cell is disclosed. When the processor writes data to the flash memory cell, if the changed data can not fill up the whole page, the processor will pick a block from one of the backed up blocks in the flash memory cell using as a special block for storing changed data temporarily, and continue to write the next changed data into the special block until whole space in the page is filled up. When the page is completely filled, then the data stored temporarily in the special block is moved to a buffer of the backed up block and then the special block is erased so that it can be used as a back up block, thus when writing data to flash memory cell, even when the change of data is unable fully fill up the whole page, the changed data still can be written continuously, and therefore the writing speed can be substantially increased.
    Type: Grant
    Filed: August 4, 2003
    Date of Patent: April 5, 2005
    Assignee: Phison Electronics Corp.
    Inventors: Chu-Cheng Liang, Chee-Kong Awyong, Khein-Seng Pua
  • Publication number: 20050041473
    Abstract: A non-volatile memory storage integrated circuit is disclosed. The non-volatile memory storage integrated circuit of the present invention comprises a controlling IC, a NAND IC and a memory IC. The non-volatile memory storage integrated circuit of the present invention can be used as a basic I/O system for electronic devices.
    Type: Application
    Filed: August 6, 2003
    Publication date: February 24, 2005
    Applicant: Phison Electronics Corp.
    Inventors: Khein-Seng Pua, Chee-Kong Awyong
  • Publication number: 20050030791
    Abstract: A method of writing data to a large block of a flash memory cell is disclosed. When the processor writes data to the flash memory cell, if the changed data can not fill up the whole page, the processor will pick a block from one of the backed up blocks in the flash memory cell using as a special block for storing changed data temporarily, and continue to write the next changed data into the special block until whole space in the page is filled up. When the page is completely filled, then the data stored temporarily in the special block is moved to a buffer of the backed up block and then the special block is erased so that it can be used as a back up block, thus when writing data to flash memory cell, even when the change of data is unable fully fill up the whole page, the changed data still can be written continuously, and therefore the writing speed can be substantially increased.
    Type: Application
    Filed: August 4, 2003
    Publication date: February 10, 2005
    Applicant: Phison Electronics Corp.
    Inventors: Chu-Cheng Liang, Chee-Kong Awyong, Khein-Seng Pua
  • Patent number: 6724680
    Abstract: A single integrated circuit flash memory controller is provided. When the CPU is operating, the operating time of the external ROM and all the flash memory devices are designed or programmed to function in an alternative manner, for example, the flash memory device will not be activated while the external ROM is operating to retrieve the program code. On the contrary, while data is being retrieved from the flash memory device, the CPU will be in a waiting status, in other words, the CPU does not function to retrieve the program code from the external ROM while the data is being retrieved from the flash memory device. Accordingly, this design makes it possible for the single integrated circuit flash memory control to accommodate required connections for connecting with the external ROM as well as all the flash memory device without the need to increasing pin terminals or the size of the integrated circuit package.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: April 20, 2004
    Assignee: Phison Electronics Corp.
    Inventors: Soo-Ching Ng, Chee-Kong Awyong
  • Publication number: 20020194403
    Abstract: The invention provides an audio video digital signal processing device comprising a plurality of memory interfaces or connecters adapted to receive memory means, a digital signal processor DSP adapted to detect connection of memory means in the memory interfaces and to recognize the audio video format of the stored data, an audio output for audio signal output, a video output for video signal output, and a digital to analog converter and amplifier controlled by the DSP to process audio and video signals from the memory means for output to external audio and video apparatus through the audio output and the video output. The audio and video signals can be processed with a variety of personalized presentation effects based upon users requirements.
    Type: Application
    Filed: June 15, 2001
    Publication date: December 19, 2002
    Inventors: Khein-Seng Pua, Hon-Wai NG, Hsueh-Chin Lin, Ming-Hsiang Peng, Yi-Hsiang Huang, Eng-Seng Tan, Chee-Kong Awyong, Chien-An Chen
  • Patent number: 6490163
    Abstract: A portable data storage device includes a main circuit board, a stack of memory circuit boards mounted on the main circuit board, and a USB port pivoted to one end of the main circuit board and adapted to electrically connect the main circuit board to, for example, the USB port of a personal computer at one of a series of angular positions.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: December 3, 2002
    Assignee: Phison Electronic Corp.
    Inventors: Khein-Seng Pua, Chien An Chen, Yu-Fong Lin, Chee-Kong Awyong
  • Publication number: 20020147882
    Abstract: The invention provides a flash memory storage device that is connectable to a computer via a universal serial bus. The universal serial bus (USB) has become a standard serial interface which allows data to be stored in and read from an external memory device at high speed. Therefore, it is advantageous to combine the benefits of a flash memory device with the speed of the universal serial bus. In addition, by designing the flash memory device with a USB interface, the flash memory device appears as a standard USB storage device which permits the host and flash memory device to connect and interact with ease.
    Type: Application
    Filed: April 10, 2001
    Publication date: October 10, 2002
    Inventors: Khein Seng Pua, Chee Kong Awyong