Abstract: An integrated circuit package includes: an integrated circuit having a surface at least partially covered by a metal layer; at least one connection point; at least one connector electrically connecting the integrated circuit with the at least one connection point; and encapsulating material encapsulating the at least one connector, at least some of the integrated circuit and at least some of the at least one connection point, such that a contact surface of the at least one connection point and the metal layer on the integrated circuit are exposed outside the encapsulating material.

Abstract: A method of manufacturing an integrated circuit package includes: assembling a composite wafer including alternating rows or columns of first and second strips on an adhesive tape, the first strips including a plurality of first dies and the second strips including a plurality of second dies, singulating the first dies from the first strips and the second dies from the second strips, forming a bond wire between respective ones of the first dies and respective ones of the second dies, thereby forming a plurality of component, embedding the components in mold compound, thereby forming a panel and separating the components from the panel, thereby forming individual integrated circuit packages.

Abstract: A transducer is provided that comprises a horn having a longitudinal axis, a bonding tool attached to the horn, and an ultrasonic generator attached to the horn and spaced from the bonding tool along the longitudinal axis of the horn. A flexure is attached to the horn between the bonding tool and the ultrasonic generator for supporting the horn whereby to increase its dynamic rigidity in directions transverse to the longitudinal axis. (FIG.

Abstract: A clamshell housing is used in a stand-alone configuration of “DualPlay” instrument modules. The housing comprises first and second sections pivotally connected by a hinge mechanism at a hinge end of the clamshell housing that allows rotation of the first and second sections relative to one other between an open and closed position. An open end of the clamshell housing is opposite to the hinge end. A sliding-fastener bumper section slides over the open end and secures the sections in the closed position. A main storage compartment is formed by the first and second sections when in the closed position and serves to hold the instrument module.

Abstract: An instrument module “DualPlay” housing system includes a first instrument module which is constructed from a measurement board enclosed by a first protective instrument module casing. The first instrument module is additionally enclosed in a main storage compartment of a housing. Additional instrument modules are enclosed in additional housings. Securing sections at the tops and bottoms of the housings secure the housings in a vertical stacked configuration.

Abstract: The invention refers to a method for indicating the current status of a removable media device provided for being loaded with at least one removable medium, and being connected to a device for reading and/or writing AV storage media. The method has the steps of checking the type of user input upon occurrence of user input, keeping the status of the removable media device if the type of user input is not related to the removable media device, else checking whether a characteristic feature of the at least one removable medium has changed, keeping the current status if the characteristic feature of the at least one removable medium has not changed, and else updating the status.

Abstract: Embodiments of a phase interpolator for a phase-locked loop are presented herein.

Abstract: A first oscillatory signal is distributed to a number of destinations in an integrated circuit die. The frequency of a second oscillatory signal is made to track the average frequency of the first oscillatory signal, using an injection locked oscillator, as such rejecting high frequency jitter. The second oscillatory signal is provided to one or more of the destinations. Other embodiments are also described and claimed.

Abstract: A bonding apparatus such as an ultrasonic transducer is provided that comprises an oscillation amplification device having a longitudinal axis and a substantially triangular cross-sectional area on a plane that is orthogonal to the longitudinal axis. An ultrasonic driver is coupled to the oscillation amplification device at a first position along the longitudinal axis and a bonding tool is mounted to the oscillation amplification device at a second position along the longitudinal axis spaced from the first position.

Abstract: A processor having asymmetric secondary processing resources. One disclosed embodiment includes a first execution resource to perform a first function and a second execution resource that also performs the second function, although the second processing resource is asymmetric to the first resource in that it has a lower throughput than the first processing resource. Switching logic switches execution from the first processing resource to the second processing resource in a reduced power consumption mode.

Abstract: A master mould is made by wire cutting a plate in two or more directions to provide a base with an array of master mould needles protruding therefrom. The size and shape of the master mould needles can readily be varied by varying the angles of upward and downward cuts in the two or more directions. The master mould is used to make a secondary mould by hot embossing a secondary mould plate onto the master mould. This forms through-holes in the secondary mould. The secondary mould is plated with a layer of metal, which forms a microneedle array.

Abstract: A method and apparatus for jitter reduction in a Phase Locked Loop (PLL) that includes determining a size of a original charge pump adequate to generate an appropriate control voltage to a Voltage Controlled Oscillator (VCO) of a PLL based on the charge pump receiving a single up signal or down signal within one cycle of a PLL input reference clock. N number of the up signal or down signal are generated to a second charge pump 1/N the size of the original charge pump. The N number of the up signal or the down signal occurs within one cycle of the PLL input reference clock. The second charge pump generates N second control voltage corrections each being 1/N the amplitude of the appropriate control voltage glitch, thus minimizing glitches on the second control voltages and reducing jitter to the VCO.

Abstract: An electronic device having a first piece, a second piece moveable between an open position and a closed position with respect to the first piece, and an ambient light sensor operable to detect ambient light when the second piece is not closed. The electronic device is operated in a first mode when the second piece is in an open position and in a second mode when the second piece is in the closed position.

Abstract: An electronic device having a first piece, a second piece moveable with respect to the first piece, and a position sensor operable to sense the position of the second piece relative to the first piece. The electronic device is operated in a first mode or a second mode dependent upon the position of the second piece relative to the first piece. Optionally, a proximity sensor is provided to detect the presence of a body in close proximity to the device when the second piece is in an open position relative to the first piece.

Abstract: A system and method directed to testing various communication signals and related components in a communications network. In one embodiment of the invention, a first set of data about a signal is collected when the signal is at an origin point in the communications network. Further, a second set of data about the signal is collected when the signal is at a destination point in the communications network. These two snapshots of the signal in the system can then be analyzed to determine a quality measurement based on a comparison of the first set of data and the second set of data. With such a testing method and system, various signals throughout a communications network can be tested at analyzed at any point n the system and trouble spots or high traffic areas in the communications network can be identified more quickly.

Abstract: Embodiments of the invention may include a reference input port to receive a reference clock, the reference clock being based on a bypass clock, a feedback input port to receive a feedback clock from a clocked circuit, and logic to compare the reference clock and the feedback clock and to generate an output based on the comparison.

Abstract: A self-biased phase locked loop (PLL) circuit includes a charge pump to generate a control voltage, a controlled oscillator coupled to the charge pump to generate the output signal based at least in part upon the control voltage, discharge circuitry coupled to the charge pump to discharge the control voltage, and frequency detection circuitry coupled to the controlled oscillator and the discharge circuitry to generate a digital feedback signal for terminating discharge of the control voltage by the discharge circuitry when the output signal reaches a threshold frequency that is a fraction of the target frequency.