Patents by Inventor Chee Siang Chow

Chee Siang Chow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • TIMER CONTROL FOR PERIPHERAL COMPONENT INTERCONNECT EXPRESS COMPONENTS IMPLEMENTED WITH THUNDERBOLT CONTROLLERS
    Publication number: 20210382839
    Abstract: Aspects of the embodiments are directed to systems, methods, and devices for controlling power management entry. A PCIe root port controller can be configured to receive, at a downstream port of the root port controller, from an upstream switch port, a first power management entry request; reject the first power management entry request; transmit a negative acknowledgement message to the upstream switch port; initiate a timer for at least 20 microseconds; during the 20 microseconds, ignore any power management entry requests received from the upstream switch port; receive, after the expiration of the 20 microseconds, a subsequent power management entry request; accept the subsequent power management entry request; and transmit an acknowledgement of the acceptance of the subsequent power management entry request to the upstream switch port.
    Type: Application
    Filed: August 25, 2021
    Publication date: December 9, 2021
    Applicant: Intel Corporation
    Inventors: Christopher Wing Hong Ngau, Hooi Kar Loo, Poh Thiam Teoh, Shashitheren Kerisnan, Maxim Dan, Chee Siang Chow
  • Timer control for peripheral component interconnect express components implemented with thunderbolt controllers
    Patent number: 11132319
    Abstract: Aspects of the embodiments are directed to systems, methods, and devices for controlling power management entry. A PCIe root port controller can be configured to receive, at a downstream port of the root port controller, from an upstream switch port, a first power management entry request; reject the first power management entry request; transmit a negative acknowledgement message to the upstream switch port; initiate a timer for at least 20 microseconds; during the 20 microseconds, ignore any power management entry requests received from the upstream switch port; receive, after the expiration of the 20 microseconds, a subsequent power management entry request; accept the subsequent power management entry request; and transmit an acknowledgement of the acceptance of the subsequent power management entry request to the upstream switch port.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: September 28, 2021
    Assignee: Intel Corporation
    Inventors: Christopher Wing Hong Ngau, Hooi Kar Loo, Poh Thiam Teoh, Shashitheren Kerisnan, Maxim Dan, Chee Siang Chow
  • TIMER CONTROL FOR PERIPHERAL COMPONENT INTERCONNECT EXPRESS COMPONENTS IMPLEMENTED WITH THUNDERBOLT CONTROLLERS
    Publication number: 20190042510
    Abstract: Aspects of the embodiments are directed to systems, methods, and devices for controlling power management entry. A PCIe root port controller can be configured to receive, at a downstream port of the root port controller, from an upstream switch port, a first power management entry request; reject the first power management entry request; transmit a negative acknowledgement message to the upstream switch port; initiate a timer for at least 20 microseconds; during the 20 microseconds, ignore any power management entry requests received from the upstream switch port; receive, after the expiration of the 20 microseconds, a subsequent power management entry request; accept the subsequent power management entry request; and transmit an acknowledgement of the acceptance of the subsequent power management entry request to the upstream switch port.
    Type: Application
    Filed: January 12, 2018
    Publication date: February 7, 2019
    Inventors: Christopher Wing Hong Ngau, Hooi Kar Loo, Poh Thiam Teoh, Shashitheren Kerisnan, Maxim Dan, Chee Siang Chow