Patents by Inventor Chee Siew

Chee Siew has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High di/dt capacity measurement hardware
    Patent number: 9846182
    Abstract: Hardware test systems are provided that have an electrical test loop with a minimum length of less than 200 mm, a maximum di/dt capacity of at least 1500 A/?s and a minimum parasitic inductance of less than 100 nH. The hardware tests systems can be used for commutation measurement or other test applications requiring low stray inductance.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: December 19, 2017
    Assignee: Infineon Technologies AG
    Inventors: Pon Tiam Meng, Tai Chee Siew
  • High di/dt Capacity Measurement Hardware
    Publication number: 20150346242
    Abstract: Hardware test systems are provided that have an electrical test loop with a minimum length of less than 200 mm, a maximum di/dt capacity of at least 1500A/?s and a minimum parasitic inductance of less than 100 nH. The hardware tests systems can be used for commutation measurement or other test applications requiring low stray inductance.
    Type: Application
    Filed: May 30, 2014
    Publication date: December 3, 2015
    Inventors: Pon Tiam Meng, Tai Chee Siew
  • Wire bond with multiple stitch bonds
    Publication number: 20050202621
    Abstract: The invention provides a wire bond bonding a wire to a connection pad of an electronic device, and a method of forming the wire bond. A first stitch bond is formed on the connection pad, and a second stitch bond is next formed on the connection pad that is contiguous with the first stitch bond.
    Type: Application
    Filed: March 11, 2004
    Publication date: September 15, 2005
    Inventors: Yam Wong, Chee Siew, Wei Liu, Zuo Shen