Patents by Inventor Chein-Cheng Wang

Chein-Cheng Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6440841
    Abstract: The present invention is a method of fabricating interconnects. A semiconductor substrate having a dielectric layer is provided. The dielectric layer has a via opening therein, which exposes the semiconductor substrate. Next, the surfaces of the via opening is covered with a conformal titanium layer formed by a sputtering process. The surface of the conformal titanium layer is covered with an Al—Si—Cu alloy layer formed by a sputtering process at a temperature of about 0° C. to 200° C. Then, the surface of the Al—Si—Cu alloy layer is covered with an Al—Cu alloy layer formed by a sputtering process at a temperature of about 380° C. to 450° C., which Al—Cu alloy layer fills the via opening. The Al—Cu alloy layer, the Al—Si—Cu alloy layer and the wetting layer on the dielectric layer are patterned by photolithography and etching process.
    Type: Grant
    Filed: April 12, 1999
    Date of Patent: August 27, 2002
    Assignee: United Microelectronics Corp.
    Inventors: Chein-Cheng Wang, Shih-Chanh Chang
  • Publication number: 20010053596
    Abstract: The present invention is a method of fabricating interconnects. A semiconductor substrate having a dielectric layer is provided. The dielectric layer has a via opening therein, which exposes the semiconductor substrate. Next, the surfaces of the via opening is covered with a conformal titanium layer formed by a sputtering process. The surface of the conformal titanium layer is covered with an Al—Si—Cu alloy layer formed by a sputtering process at a temperature of about 0° C. to 200° C. Then, the surface of the Al—Si—Cu alloy layer is covered with an Al—Cu alloy layer formed by a sputtering process at a temperature of about 380° C. to 450° C., which Al—Cu alloy layer fills the via opening. The Al—Cu alloy layer, the Al—Si—Cu alloy layer and the wetting layer on the dielectric layer are patterned by photolithography and etching process.
    Type: Application
    Filed: April 12, 1999
    Publication date: December 20, 2001
    Inventors: CHEIN-CHENG WANG, SHIH-CHANH CHANG
  • Patent number: 6207567
    Abstract: A method of fabricating a glue layer and a barrier layer. A Ti layer is formed with a collimator sputtering in the via opening or the contact opening of the substrate. Through the control of flow of N2 and Ar, a nitride mode TiNx layer is formed on the Ti layer by sputtering. The nitride mode TiNx layer and the Ti layer uncovered by the nitride mode TiNx layer are treated with N2 RF plasma. This strengthens the structure of the nitride mode TiNx layer and allows the reaction with the exposed Ti layer so that it is transformed into a TiNx layer.
    Type: Grant
    Filed: April 12, 1999
    Date of Patent: March 27, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Chein-Cheng Wang, Shih-Chanh Chang
  • Patent number: 6197684
    Abstract: A method for forming a metal/metal nitride layer. A dielectric layer is formed on a substrate comprising a conductive region. The dielectric layer comprises an opening exposing a portion of the conductive region. A conformal metal layer is formed on the dielectric layer by physical vapor deposition using a collimator to cover the exposed conductive region. A metal nitride layer is formed on the metal layer. A part of the metal layer may be exposed due to poor step coverage. An implanting process is performed on the metal nitride layer and on the exposed metal layer using a nitric gas.
    Type: Grant
    Filed: March 19, 1999
    Date of Patent: March 6, 2001
    Assignee: United Microelectronics Corp.
    Inventor: Chein-Cheng Wang