Abstract: An integrated circuit has a buried insulation layer formed over a semiconductor substrate, and a semiconductor mesa formed over the buried insulation layer. A low resistivity guard ring substantially surrounds the semiconductor mesa and is in contact with the semiconductor substrate. The low resistivity guard ring is grounded and isolates the semiconductor mesa from RF signals.

Abstract: An integrated circuit has a buried insulation layer formed over a semiconductor substrate, and a semiconductor mesa formed over the buried insulation layer. A low resistivity guard ring substantially surrounds the semiconductor mesa and is in contact with the semiconductor substrate. The low resistivity guard ring is grounded and isolates the semiconductor mesa from RF signals.

Abstract: An integrated circuit has a buried insulation layer formed over a semiconductor substrate, and a semiconductor mesa formed over the buried insulation layer. A low resistivity guard ring substantially surrounds the semiconductor mesa and is in contact with the semiconductor substrate. The low resistivity guard ring is grounded and isolates the semiconductor mesa from RF signals.

Abstract: A neutron detection structure built from a Silicon-On-Insulator memory cell includes a conversion layer for converting incident neutrons into emitted charged particles, a device layer for receiving the emitted charged particles, a buried oxide layer separating the conversion layer from the device layer and directly adjacent to the conversion layer and the device layer, an isolation layer, a passivation layer formed on the isolation layer opposite the device layer and buried oxide layer, a carrier adhered by an adhesion layer to the passivation layer opposite the isolation layer, and a plurality of conductive contacts to provide electrical contact to the device layer.

Abstract: A neutron detection structure built from a Silicon-On-Insulator memory cell includes a conversion layer for converting incident neutrons into emitted charged particles, a device layer for receiving the emitted charged particles, a buried oxide layer separating the conversion layer from the device layer and directly adjacent to the conversion layer and the device layer, an isolation layer, a passivation layer formed on the isolation layer opposite the device layer and buried oxide layer, a carrier adhered by an adhesion layer to the passivation layer opposite the isolation layer, and a plurality of conductive contacts to provide electrical contact to the device layer.

Abstract: The present invention provides silicon based thin-film structures that can be used to form high frequency optical modulators. Devices of the invention are formed as layered structures that have a thin-film dielectric layer, such as silicon dioxide, sandwiched between silicon layers. The silicon layers have high free carrier mobility. In one aspect of the invention a single crystal silicon material is bonded to a thin-film dielectric material to form a silicon-insulator-silicon thin-film structure for an optical modulator.

Abstract: At least one magnetic field sensing device and GPS receiver integrated in a discrete, single-chip package, and a method of manufacture for the same. Rather than requiring at least two separate chips to be used to realize GPS positioning and compassing capabilities in a single device, an integrated, single chip solution can be used. A single chip integration of a GPS receiver and at least one magnetic field sensing device can reduce the physical space required to provide positioning and electronic compassing capabilities in a single device, and therefore allow such devices to be smaller, lighter, and possibly more portable.

Abstract: The present invention provides silicon based thin-film structures that can be used to form high frequency optical modulators. Devices of the invention are formed as layered structures that have a thin-film dielectric layer, such as silicon dioxide, sandwiched between silicon layers. The silicon layers have high free carrier mobility. In one aspect of the invention a high mobility silicon layer can be provided by crystallizing an amorphous silicon layer. In another aspect of the invention, a high mobility silicon layer can be provided by using selective epitaxial growth and extended lateral overgrowth thereof.

Abstract: A varactor has a plurality of alternating P? wells and N+ regions formed in a silicon layer. Each of the P? wells forms a first N+/P? junction with the N+ region on one of its side and a second N+/P? junction with the N+ region on the other of its sides. A gate oxide is provided over each of the P? wells, and a gate silicon is provided over each of the gate oxides. The potential across the gate silicons and the N+ regions controls the capacitance of the varactor.

Abstract: The present invention provides silicon based thin-film structures that can be used to form high frequency optical modulators. Devices of the invention are formed as layered structures that have a thin-film dielectric layer, such as silicon dioxide, sandwiched between silicon layers. In one aspect of the invention an electrical contact structure is provided. The electrical contact structure comprises a connecting portion that electrically connects an active region of at least one of the silicon layers to a contact portion of the electrical contact structure.

Abstract: A semiconductor device includes first and second polysilicon areas on a chip. The first polysilicon area corresponds to circuit elements of the semiconductor device. At least some of the first polysilicon corresponds to polysilicon gates. At least some of the second polysilicon area comprises contacts of the semiconductor device. Metal covers the polysilicon contacts.

Abstract: At least one magnetic field sensing device and GPS receiver integrated in a discrete, single-chip package, and a method of manufacture for the same. Rather than requiring at least two separate chips to be used to realize GPS positioning and compassing capabilities in a single device, an integrated, single chip solution can be used. A single chip integration of a GPS receiver and at least one magnetic field sensing device can reduce the physical space required to provide positioning and electronic compassing capabilities in a single device, and therefore allow such devices to be smaller, lighter, and possibly more portable.

Abstract: At high frequencies, signal losses may occur in circuit designs employing magnetic isolators. Eddy current losses in the magnetic isolator substrate material are at least partially responsible for this signal loss. As the Eddy current losses may depend on the properties of the substrate, the type of substrate chosen for fabricating a magnetic isolator may be critical for reducing these losses. By fabricating the magnetic isolator on a high performance substrate, the Eddy current losses are reduced and the magnetic isolator provides better output signals at high frequencies.

Abstract: A semiconductor device includes first and second polysilicon areas on a chip. The first polysilicon area corresponds to circuit elements of the semiconductor device. At least some of the first polysilicon corresponds to polysilicon gates. At least some of the second polysilicon area comprises contacts of the semiconductor device. Metal covers the polysilicon contacts.

Abstract: A semiconductor device includes first and second polysilicon areas on a chip. The first polysilicon area corresponds to circuit elements of the semiconductor device. At least some of the first polysilicon corresponds to polysilicon gates. At least some of the second polysilicon area comprises contacts of the semiconductor device. Metal covers the polysilicon contacts.

Abstract: A varactor has a plurality of alternating P− wells and N+ regions formed in a silicon layer. Each of the P− wells forms a first N+/P− junction with the N+ region on one of its side and a second N+/P− junction with the N+ region on the other of its sides. A gate oxide is provided over each of the P− wells, and a gate silicon is provided over each of the gate oxides. The potential across the gate silicons and the N+ regions controls the capacitance of the varactor.

Abstract: A transistor has a gate, a source, and a drain. A spacer around the gate is etched so as to expose a top wall and at least a portion of a sidewall of the gate. Silicide layers contact the top wall and the exposed portion of the sidewall of the gate, the source, and the drain of the transistor.

Abstract: A semiconductor device includes first and second polysilicon areas on a chip. The first polysilicon area corresponds to circuit elements of the semiconductor device. At least some of the first polysilicon corresponds to polysilicon gates. At least some of the second polysilicon area comprises contacts of the semiconductor device. Metal covers the polysilicon contacts.

Abstract: A high density magnetic memory device and method of manufacture therefor, wherein the magnetic bit region is provided after selected higher temperature processing steps are performed. Illustrative higher temperature processing steps include those that are performed above for example 400.degree. C., any may include contact and via plug processing. The present invention may allow, for example, contact and via plug processing to be used to form magnetic RAM devices. As indicated above, contact and/or via plug processing typically allows the size of the contacts and vias to be reduced, and the packing density of the resulting memory device to be increased.

Abstract: A method for manufacturing magnetoresistive sensors whereby a first determination of an anisotropy field of the magnetoresistive material is made and an annealing temperature is selected based on a desired final value of the anisotropy field.