Patents by Inventor Cheisan Yue

Cheisan Yue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100200918
    Abstract: A CMOS memory element comprising silicon-on-insulator MOSFET transistors is disclosed wherein at least one of the MOSFET transistors is configured such that the body of the transistor is not connected to a voltage source and is instead permitted to electrically float. Implementations of the disclosed memory element with increased immunity to errors caused by heavy ion radiation are also disclosed.
    Type: Application
    Filed: February 10, 2009
    Publication date: August 12, 2010
    Applicant: Honeywell International Inc.
    Inventors: Bradley J. Larsen, Todd A. Randazzo, Cheisan Yue
  • Publication number: 20100006912
    Abstract: A complementary metal-oxide-semiconductor (CMOS) static random-access-memory (SRAM) element comprising a planar metal-insulator-metal (MIM) capacitor is disclosed, and the planar MIM capacitor is electrically connected to the transistors in the CMOS memory element to reduce the effects of charged particle radiation on the CMOS memory element. Methods for immunizing a CMOS SRAM element to the effects of charged particle radiation are also disclosed, along with methods for manufacturing CMOS SRAM including planar MIM capacitors as integrated circuits.
    Type: Application
    Filed: February 10, 2009
    Publication date: January 14, 2010
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventors: Bradley J. Larsen, Todd A. Randazzo, Cheisan Yue
  • Publication number: 20070103961
    Abstract: A static random access memory (SRAM) cell with single event and soft error protection using ferroelectric material is presented. The SRAM cell comprises two inverters in a mutual feedback loop, with the output of each of the inverters coupled to the input of the other. A ferroelectric capacitor is coupled to the output of one of the inverters in order to induce an RC delay and provide single event upset (SEU), single event effect (SEE), single event transient (SET), and soft error protection. In addition, a method is presented where ferroelectric capacitor of the system is fabricated after the underlayers of the SRAM cell have been implemented in order to avoid substantial changes to standard underlayer processing.
    Type: Application
    Filed: November 7, 2005
    Publication date: May 10, 2007
    Applicant: Honeywell International Inc.
    Inventors: Weston Roper, Cheisan Yue
  • Publication number: 20070101927
    Abstract: Silicon based thin-film optical waveguides and method of making. A method in accordance with one aspect of the present invention generally comprises the steps of providing a substrate, depositing a thin-film dielectric layer on the substrate, forming a channel in the thin-film dielectric layer, and providing a silicon layer in the channel. The silicon layer provided in the channel can be epitaxially grown in the channel. In another aspect of the present invention, the silicon layer provided in the channel can be provided as an amorphous or partially crystalline material that is subsequently crystallized.
    Type: Application
    Filed: November 10, 2005
    Publication date: May 10, 2007
    Inventors: Thomas Keyser, Cheisan Yue
  • Publication number: 20060063679
    Abstract: A semiconductor-insulator-semiconductor (SIS) device is presented along with a device for fabricating the same. The SIS device includes a lower semiconductor layer, an upper semiconductor layer, and a central insulating layer located between the overlapping portions of the lower semiconductor layer and the upper semiconductor layer. The central insulating layer is nitridized in order to make the layer less permeable to dopant species and to therefore minimize dopant cross-diffusion. Subsequently the switching characteristics of the SIS device are optimized when the SIS device is used as, for example, an integrated optical modulator.
    Type: Application
    Filed: September 13, 2005
    Publication date: March 23, 2006
    Applicant: Honeywell International Inc.
    Inventors: Cheisan Yue, Thomas Keyser
  • Publication number: 20050212071
    Abstract: An integrated circuit has a buried insulation layer formed over a semiconductor substrate, and a semiconductor mesa formed over the buried insulation layer. A low resistivity guard ring substantially surrounds the semiconductor mesa and is in contact with the semiconductor substrate. The low resistivity guard ring is grounded and isolates the semiconductor mesa from RF signals.
    Type: Application
    Filed: March 26, 2004
    Publication date: September 29, 2005
    Inventors: Cheisan Yue, James Seefeldt
  • Publication number: 20050207704
    Abstract: The present invention provides silicon based thin-film structures that can be used to form high frequency optical modulators. Devices of the invention are formed as layered structures that have a thin-film dielectric layer, such as silicon dioxide, sandwiched between silicon layers. In one aspect of the invention an electrical contact structure is provided. The electrical contact structure comprises a connecting portion that electrically connects an active region of at least one of the silicon layers to a contact portion of the electrical contact structure.
    Type: Application
    Filed: August 10, 2004
    Publication date: September 22, 2005
    Inventors: Thomas Keyser, Cheisan Yue
  • Publication number: 20050207691
    Abstract: The present invention provides silicon based thin-film structures that can be used to form high frequency optical modulators. Devices of the invention are formed as layered structures that have a thin-film dielectric layer, such as silicon dioxide, sandwiched between silicon layers. The silicon layers have high free carrier mobility. In one aspect of the invention a high mobility silicon layer can be provided by crystallizing an amorphous silicon layer. In another aspect of the invention, a high mobility silicon layer can be provided by using selective epitaxial growth and extended lateral overgrowth thereof.
    Type: Application
    Filed: August 10, 2004
    Publication date: September 22, 2005
    Inventors: Thomas Keyser, Cheisan Yue, Bradley Larsen
  • Publication number: 20050208694
    Abstract: The present invention provides silicon based thin-film structures that can be used to form high frequency optical modulators. Devices of the invention are formed as layered structures that have a thin-film dielectric layer, such as silicon dioxide, sandwiched between silicon layers. The silicon layers have high free carrier mobility. In one aspect of the invention a single crystal silicon material is bonded to a thin-film dielectric material to form a silicon-insulator-silicon thin-film structure for an optical modulator.
    Type: Application
    Filed: August 10, 2004
    Publication date: September 22, 2005
    Inventors: Cheisan Yue, Thomas Keyser
  • Patent number: 6603166
    Abstract: A method of forming a frontside contact to a Silicon-On-Insulator (SOI) wafer is described. A connection polysilicon connects a silicon substrate layer to a contact plug. This connection provides a means to ground or bias the bottom substrate of the SOI wafer. Spacers may be added to provide additional doping.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: August 5, 2003
    Assignee: Honeywell International Inc.
    Inventors: Paul S. Fechner, Cheisan Yue
  • Patent number: 6576508
    Abstract: A method of forming a frontside contact to a Silicon-On-Insulator (SOI) wafer is described. A connection polysilicon connects a silicon substrate layer to a contact plug. This connection provides a means to ground or bias the bottom substrate of the SOI wafer. Spacers may be added to provide additional doping.
    Type: Grant
    Filed: August 26, 2002
    Date of Patent: June 10, 2003
    Assignee: Honeywell International Inc
    Inventors: Paul S. Fechner, Cheisan Yue
  • Publication number: 20020195638
    Abstract: A method of forming a frontside contact to a Silicon-On-Insulator (SOI) wafer is described. A connection polysilicon connects a silicon substrate layer to a contact plug. This connection provides a means to ground or bias the bottom substrate of the SOI wafer. Spacers may be added to provide additional doping.
    Type: Application
    Filed: August 26, 2002
    Publication date: December 26, 2002
    Applicant: Honeywell International Inc.
    Inventors: Paul S. Fechner, Cheisan Yue
  • Publication number: 20020130347
    Abstract: A method of forming a frontside contact to a Silicon-On-Insulator (SOI) wafer is described. A connection polysilicon connects a silicon substrate layer to a contact plug. This connection provides a means to ground or bias the bottom substrate of the SOI wafer. Spacers may be added to provide additional doping.
    Type: Application
    Filed: November 27, 2001
    Publication date: September 19, 2002
    Applicant: Honeywell International Inc.
    Inventors: Paul S. Fechner, Cheisan Yue
  • Patent number: 6225178
    Abstract: A process for oxidizing the silicon layer into a device-isolating field oxide having a radiation-hardened reduced bird's beak. An angled and rotated field implant prior to oxidation is used to increase the doping concentration in the edge region of the MOS transistors to compensate for boron leaching during oxidation. The field oxide is grown at a low temperature by high pressure oxidation which increases total dose hardness by making a silicon-rich oxide film.
    Type: Grant
    Filed: January 2, 1990
    Date of Patent: May 1, 2001
    Assignee: Honeywell Inc.
    Inventors: Gordon A. Shaw, Curtis H. Rahn, Cheisan Yue, Todd A. Randazzo