Patents by Inventor Chen An

Chen An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11676896
    Abstract: A semiconductor device includes a substrate, a gate structure, source/drain structures, a backside via, and a power rail. The gate structure extends along a first direction parallel with a front-side surface of the substrate. The backside via extends along a second direction parallel with the front-side surface of the substrate but perpendicular to the first direction, the backside via has a first portion aligned with one of the source/drain structures along the first direction and a second portion aligned with the gate structure along the first direction, the first portion of the backside via has a first width along the first direction, and the second portion of the backside via has a second width along the first direction, in which the first width is greater than the second width. The power rail is on a backside surface of the substrate and in contact with the backside via.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: June 13, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Liang Chen, Li-Chun Tien
  • Patent number: 11677304
    Abstract: An optical member driving mechanism is provided, including a movable portion, a fixed portion, and a driving assembly. The movable portion is connected to an optical member. The fixed portion has an accommodating space, and the optical member is received in the accommodating space. The movable portion is movable relative to the fixed portion. The driving assembly is configured to drive the movable portion to move relative to the fixed portion.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: June 13, 2023
    Assignee: TDK TAIWAN CORP.
    Inventors: Sheng-Zong Chen, Sung-Mao Tsai, Chen-Chi Kuo
  • Patent number: 11678443
    Abstract: A hanging grounded structure is disclosed and includes a housing, a recessed portion and a hanging groove. The housing includes an opening facing a first direction and a lateral wall extended along a second direction. The lateral wall has a top edge located at a periphery of the opening. The recessed portion is recessed inwardly on the lateral wall. The hanging groove is disposed on the lateral wall and located in the recessed portion. A grounded wire is hung on the housing through the hanging groove. The hanging groove includes a starting point located at the top edge and an ending point. A curved path is formed from the starting point to the ending point. The grounded wire is hung from an interior of the housing. An end of the grounded wire is disposed in the recessed portion through the hanging groove.
    Type: Grant
    Filed: October 4, 2021
    Date of Patent: June 13, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chun-Hung Kuo, Po-Heng Chao, Jui-Ching Lee, Do Chen, Ching-Ho Chou
  • Patent number: 11672853
    Abstract: Immunogenic compositions comprising partially glycosylated viral glycoproteins for use as vaccines against viruses are provided. Vaccines formulated using mono-, di-, or tri-glycosylated viral surface glycoproteins and polypeptides provide potent and broad protection against viruses, even across strains. Pharmaceutical compositions comprising monoglycosylated hemagglutinin polypeptides and vaccines generated therefrom and methods of their use for prophylaxis or treatment of viral infections are disclosed. Methods and compositions are disclosed for influenza virus HA, NA and M2, RSV proteins F, G and SH, Dengue virus glycoproteins M or E, hepatitis C virus glycoprotein E1 or E2 and HIV glycoproteins gp120 and gp41.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: June 13, 2023
    Assignee: Academia Sinica
    Inventors: Chi-Huey Wong, Che Ma, Cheng-Chi Wang, Juine-Ruey Chen
  • Patent number: 11678029
    Abstract: This application provides a video labeling method performed by a server, and the method includes: receiving a video extraction instruction transmitted by a terminal, and obtaining a to-be-extracted video according to the video extraction instruction; extracting event information from video frames of the to-be-extracted video; forming at least one event information flow by using the event information; capturing, based on the at least one event information flow, at least one first clip that meets a plot trigger condition from the to-be-extracted video and obtaining a plot labeling tag of the at least one first clip; and transmitting the at least one first clip and the corresponding plot labeling tag to the terminal, wherein the terminal displays the at least one first clip and the corresponding plot labeling tag in a preset display region of a display interface in which the to-be-extracted video is displayed.
    Type: Grant
    Filed: November 16, 2021
    Date of Patent: June 13, 2023
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Chengwei Zhu, Zixun Sun, Xiao Chen, Wentao Yao, Tingtian Li, Zirui Tu, Shuang Zhao, Li Wang
  • Patent number: 11673892
    Abstract: The invention provides novel compounds having the general formula I: or pharmaceutically acceptable salts thereof, wherein RA, RB1, RB2, the A ring and the B ring are as described herein, pharmaceutical compositions including the compounds, and methods of using the compounds.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: June 13, 2023
    Assignee: Genentech, Inc.
    Inventors: Huifen Chen, Gregory Hamilton, Snahel Patel, Guiling Zhao, Blake Daniels, Craig Stivala
  • Patent number: 11678364
    Abstract: Methods, systems, and devices for wireless communications are described. A user equipment (UE) may receive a first slot format configuration for a first cell associated with a first radio access technology (RAT) and a first radio frequency spectrum band that conflicts with a second slot format configuration for a second cell associated with a second RAT and a second radio frequency spectrum band during at least a portion of a transmission time interval (TTI). The UE may determine that the first cell has a priority over the second cell, based on the configured slot formats or based on the radio frequency bands, and may drop a communication on the second cell based on the identified priority. The UE may then communicate during at least a portion of the TTI on the first cell while the UE drops a communication on the second cell.
    Type: Grant
    Filed: April 6, 2022
    Date of Patent: June 13, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Heechoon Lee, Peter Gaal, Wanshi Chen, Hari Sankar
  • Patent number: 11678341
    Abstract: The present disclosure relates to methods and devices for wireless communication of an apparatus, e.g., a UE and/or a base station. The apparatus may receive, from a base station, an indication of a plurality of transmission schedules for at least one of a plurality of PUSCHs or a plurality of PDSCHs, the indication including a time gap prior to a transmission of each of the plurality of PUSCHs or each of the plurality of PDSCHs. The apparatus may also receive, from the base station, DCI identifying at least one transmission schedule for at least one PUSCH of the plurality of PUSCHs or at least one PDSCH of the plurality of PDSCHs. Further, the apparatus may transmit, to the base station, the at least one PUSCH or receive, from the base station, the at least one PDSCH based on the at least one transmission schedule in the received DCI.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: June 13, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Yongjun Kwak, Huilin Xu, Yuchul Kim, Wanshi Chen, Peter Gaal, Hwan Joon Kwon
  • Patent number: 11676265
    Abstract: A method and an image processing device for mura detection on a display are proposed. The method includes the following steps. An original image of the display is received and segmented into region of interest (ROI) patches. A predetermined range of spatial frequency components are filtered out from the ROI patches to generate filtered ROI patches. A mura defect is identified from the display according to the filtered ROI patches and predetermined mura patterns.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: June 13, 2023
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chih-Yu Chu, Po-Yuan Hsieh, Chieh-En Lee, Chung-Hao Tien, Shih-Hsuan Chen
  • Patent number: 11677533
    Abstract: Certain aspects of the present disclosure relate to methods and apparatus for flexibly setting subband CSI-related parameters.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: June 13, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Yu Zhang, Wanshi Chen
  • Patent number: 11676868
    Abstract: Techniques described herein enable respective (different) types of metal silicide layers to be formed for p-type source/drain regions and n-type source/drain regions in a selective manner. For example, a p-type metal silicide layer may be selectively formed over a p-type source/drain region (e.g., such that the p-type metal silicide layer is not formed over the n-type source/drain region) and an n-type metal silicide layer may be formed over the n-type source/drain region (which may be selective or non-selective). This provides a low Schottky barrier height between the p-type metal silicide layer and the p-type source/drain region, as well as a low Schottky barrier height between the n-type metal silicide layer and the n-type source/drain region. This reduces the contact resistance for both p-type source/drain regions and n-type source/drain regions.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: June 13, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Yip Loh, Yan-Ming Tsai, Yi-Ning Tai, Raghunath Putikam, Hung-Yi Huang, Hung-Hsu Chen, Chih-Wei Chang
  • Patent number: 11674667
    Abstract: A color mixing light system comprises a pyramidal mirror assembly comprising three or more mirrors constructed and arranged in a pyramid structure and three or more color light sources. The pyramidal mirror assembly divides the light beams from the color light sources so that a first portion is reflected by the mirrors and a second portion extends beyond the mirrors to collectively form a multicolor pattern comprising plurality of overlapping color regions on a surface.
    Type: Grant
    Filed: January 4, 2022
    Date of Patent: June 13, 2023
    Assignee: E-GREEN, LLC
    Inventors: Chia Ming Chen, Marian Heman-Ackah, Yu Mo, Hemanth Kiran Gutti, Huikai Xie, Jessica Han, Albert D C Chen
  • Patent number: 11676494
    Abstract: The present invention discloses a vessel collision avoiding system and method based on Artificial Potential Field algorithm, the method comprises the following steps: (S1) obtaining a vessel information, at least one obstacle information and a target information; (S2) establishing an Artificial Potential Field (APF) by the vessel information, the at least one obstacle information and the target information, wherein the Artificial Potential Field comprises an attractive field of the target and a repulsive field of the obstacle; (S3) combining the attractive field and the repulsive field to obtain a first resultant force; (S4) Adding an external force to the Artificial Potential Field based on the vessel information or the obstacle information; (S5) combining the first resultant force and the external force to obtain a second resultant force; and (S6) the vessel sails in the direction of the second resultant force to avoid the obstacle.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: June 13, 2023
    Assignee: SHIP AND OCEAN INDUSTRIES R&D CENTER
    Inventors: Feng-Yeang Chung, Chun-Han Chu, Chi-Min Liao, Mu-Hua Chen, Ling-Ji Mu, Li-Yuan Zhang, Sheng-Wei Huang
  • Patent number: 11676980
    Abstract: An image sensor includes a substrate and a first photodiode (PD) having a first size in the substrate. The image sensor further includes a second PD having a second size in the substrate, wherein the first size is different from the second size. The image sensor further includes a first buffer layer over the substrate. The image sensor further includes a shield layer over the first buffer, wherein the first buffer layer and the shield layer define a first recess aligned with the first PD and a second recess aligned with the second PD. The image sensor further includes a flicker reduction layer in the first recess, wherein the second recess is free of the flicker reduction layer.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: June 13, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Han Chen, Chen-Chun Chen, Fu-Cheng Chang, Kuo-Cheng Lee
  • Patent number: 11677387
    Abstract: A clock circuit includes a latch circuit, a memory state latch circuit, a first inverter, a memory state trigger circuit and a second inverter. The latch circuit is configured to latch an enable signal, and to generate a latch output signal based on a first clock signal and a first output clock signal. The memory state latch circuit is configured to latch a second output clock signal responsive to a third output clock signal. The first inverter is configured to generate the first output clock signal responsive to the third output clock signal. The memory state trigger circuit is configured to generate the second output clock signal responsive to the latch output signal. The second inverter is configured to generate the first clock signal responsive to a second clock signal, and configured to control the latch circuit and the memory state trigger circuit based on the first clock signal.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: June 13, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hao-I Yang, Cheng Hung Lee, Chen-Lin Yang, Chiting Cheng, Fu-An Wu, Yangsyu Lin
  • Patent number: 11676850
    Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a first isolation structure which has a first corner. The semiconductor device also includes a first well region with a first conductive type. The semiconductor device includes further includes a gate structure over the first well region and covers a portion of the first corner of the first isolation structure. In addition, the semiconductor device includes a first doped region and a second doped region disposed on two opposites of the gate structure. Each of the first doped region and the second doped region has the first conductive type. The semiconductor device also includes a first counter-doped region in the first well region with a second conductive type different from the first conductive type. The first counter-doped region covers the first corner of the first isolation structure.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: June 13, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chia-Chen Chang, Yuan-Cheng Yang, Yun-Chi Wu
  • Patent number: 11675726
    Abstract: A method including creating a first bus guide and a second bus guide of a plurality of bus guides for an integrated circuit is disclosed. The method includes routing the first bus guide and the second bus guide through a plurality of layout blocks of the integrated circuit. The method includes annotating the first bus guide or the second bus guide to identify a plurality of areas for placing a plurality of repeaters within the first bus guide or the second bus guide. The method includes, based on the annotated first bus guide and the second bus guide, generating, by at least one processor, a plurality of guidance directories corresponding to a plurality of routes through the plurality of layout blocks for placing the plurality of repeaters at the plurality of layout blocks on the identified plurality of areas on the first bus guide or the second bus guide.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: June 13, 2023
    Assignee: Synopsys, Inc
    Inventors: Kai-Ping Wang, Songmei Chen, Ying Liu, Xiaolin Yuan
  • Patent number: 11677657
    Abstract: A method and an apparatus for obtaining information about a forwarding path of a data packet in segment routing (SR) include, when a first path indicated by a plurality of path identifiers in initial information is a unique shortest path from a start node on the first path to an end node on the first path, the first path is indicated using a node-segment identifier (SID) of the end node on the first path instead of the path identifiers.
    Type: Grant
    Filed: January 11, 2021
    Date of Patent: June 13, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Cheng Li, Stefano Previdi, Guoyi Chen
  • Patent number: D988700
    Type: Grant
    Filed: October 7, 2022
    Date of Patent: June 13, 2023
    Assignee: NIKE, Inc.
    Inventor: Yuchung K. Chen
  • Patent number: D988941
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: June 13, 2023
    Inventor: Yu Chen