Patents by Inventor Chen C. Hsue

Chen C. Hsue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of making buried bit line ROM with low bit line resistance
    Patent number: 5529943
    Abstract: A ROM array comprises orthogal sets of buried bit lines and polysilicon wordlines. The buried bit lines comprise trenches with insulating material on the side walls, the trenches then being filled with polysilicon. This reduces bit line sheet resistance and increases the punch-through voltage between adjacent bit lines.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: June 25, 1996
    Assignee: United Microelectronics Corporation
    Inventors: Gary Hong, Chen C. Hsue