Patents by Inventor Chen Chang-An

Chen Chang-An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240190050
    Abstract: A bicycle component includes a composite laminate. The composite laminate includes a hollow container made of a first polymer-based material, a layer of a second polymer-based material disposed on the hollow container, and a layer of a composite material disposed on the layer of the second polymer-based material. The bicycle component also includes a water soluble core material disposed within hollow container.
    Type: Application
    Filed: December 8, 2023
    Publication date: June 13, 2024
    Applicant: SRAM, LLC
    Inventors: CHIA CHANG CHANG, CHEN HSIUNG CHEN, HUAN CHING HSU, CHING HAN LIU, CHU CHEN WANG
  • Publication number: 20240190712
    Abstract: The invention provides a nano-silicon agglomerate composite negative electrode material of pine needle and branch-shaped three-dimensional network structure and a method for preparing the same. The nano-silicon agglomerate composite negative electrode material comprises nano-sized core particles, a nano-silicon agglomerate of pine needle and branch-shaped three-dimensional network structure growing around the nano-sized core particles, and a composite coating layer over the nano-silicon agglomerate of needles and branch-shaped three-dimensional network structure. With measurements, it is shown that the nano-silicon agglomerate composite negative electrode material, when being applied in lithium ion battery, has excellent battery charge-discharge cycle performances and rate capability, and it has an initial discharge capacity per gram of more than 2600 mAh/g, and an initial coulombic efficiency of no less than 85%.
    Type: Application
    Filed: August 3, 2021
    Publication date: June 13, 2024
    Applicant: TOMI(CHENGDU) APPLIED TECHNOLOGY RESEARCH INSTITUTE COMPANY LIMITED
    Inventors: Weijie YU, Si-Chung CHANG, Fusheng LI, Chang ZHAO, Xuezhi DAI, Xiaobing CHEN, Yang YU
  • Publication number: 20240196225
    Abstract: In a spectrum query method for automatic frequency coordination protocol applied to an automatic frequency coordination protocol device, an automatic frequency coordination server is inquired for information of adjacent automatic frequency coordination devices corresponding to the automatic frequency coordination device, and an adjacent device list corresponding to the automatic frequency coordination device is obtained; spectrum information of the adjacent automatic frequency coordination devices in the adjacent device list is obtained, and whether to inquire from the automatic frequency coordination server and update the spectrum information of the automatic frequency coordination devices is determined according to the spectrum information.
    Type: Application
    Filed: November 23, 2023
    Publication date: June 13, 2024
    Inventors: CHIA-AN CHIANG, CHEN-CHANG HO, CHIA-MING CHANG
  • Patent number: 12009029
    Abstract: A system is provided. The system includes a multiply-and-accumulate circuit and a local generator. The multiply-and-accumulate circuit is coupled to a memory array and generates a multiply-and-accumulate signal indicating a computational output of the memory array. The local generator is coupled to the memory array and generates at least one reference signal at a node in response to one of a plurality of global signals that are generated according to a number of the computational output. The local generator is further configured to generate an output signal according to the signal and a summation of the at least one reference signal at the node.
    Type: Grant
    Filed: March 16, 2023
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Der Chih, Meng-Fan Chang, May-Be Chen, Cheng-Xin Xue, Je-Syu Liu
  • Patent number: 12007875
    Abstract: A chip having a debug memory interface includes a processing unit, an internal storage unit, a debug memory interface, and a detection unit. The internal storage unit is used to record status data during operation of the processing unit. The detection unit is used to detect whether the debug memory interface is electrically connected to an external memory device. When the debug memory interface is judged to be electrically connected to the external memory device, a control signal is transmitted to the processing unit in order to trigger the processing unit to read a debug program from the external memory device and execute the debug program to run a debug mode based on the status data.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: June 11, 2024
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Pao-Chen Ko, Hao-Yang Chang
  • Patent number: 12006950
    Abstract: A combination structure of a fan guard and static blades is disclosed. The fan guard includes an annular plate, multiple radial ribs, and multiple circumferential ribs. The annular plate is fixed on a motor base. The radial ribs arranged around the annular plate extend radially. The circumferential ribs are arranged concentrically and spacedly and connected with radial ribs in series. Each of the static blades includes a blade body, an inner and an outer coupling plate. The inner coupling plate and the outer coupling plate are arranged on two ends of the blade body respectively. The blade body is fixed on one side of the fan guard through the inner coupling plate being combined with one end of the radial rib and through the outer coupling plate being combined with another end of the radial rib to make the static blades be combined on the fan guard.
    Type: Grant
    Filed: November 9, 2023
    Date of Patent: June 11, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventor: Shun-Chen Chang
  • Patent number: 12006942
    Abstract: A serial-type diagonal fan assembly having a first fan and at least one second fan is provided. The first fan has a first front fan frame and a first fan wheel. A first hub of the first fan wheel has a radial cross-sectional area increased from a top toward a bottom of the first hub. The second fan has a second front fan frame and a second fan wheel, the second hub of the second fan wheel has an axial cross-sectional area increased from a top to a bottom of the second hub. The first fan and the second fan are arranged in a series. A spoiler is arranged on a second air inlet of the second front fan frame, an outer edge of the spoiler is embedded in a positioning groove of the second front fan frame without protruding from the second front fan frame.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: June 11, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Po-Wei Huang, Chien-Ming Lee, Shun-Chen Chang
  • Patent number: 12006738
    Abstract: An extension device, including a connecting base and an anti-theft lock assembly, is provided. The connecting base includes a housing, a first moving member, a fixed member, and a second moving member. The fixed member is disposed at one side of the housing and includes a lock hole. The second moving member is movably disposed between the first moving member and the fixed member. The anti-theft lock assembly is detachably disposed at one side of the fixed member opposite to the second moving member. The anti-theft lock assembly is adapted to pass through the lock hole of the fixed member and push against the second moving member, so that the second moving member abuts against the first moving member to stop the first moving member at a buckling position. In addition, an electronic system, including the extension device, is also provided.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: June 11, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Chun-Fu Chang, I-Tien Hsieh, Hui-Chen Wang
  • Patent number: 12007617
    Abstract: An imaging lens system has an optical axis. The imaging lens system includes a plurality of optical elements, a lens barrel, an optical mark structure and a curable liquid. The optical elements are arranged along the optical axis. The lens barrel surrounds the optical axis, and at least one of the optical elements is accommodated in the lens barrel. The optical mark structure is disposed on the lens barrel, and the optical mark structure includes a plurality of optical mark units arranged side by side along a circumference direction that surrounds the optical axis. The curable liquid is disposed on the optical mark structure. The curable liquid is in physical contact with at least one of the optical mark units, and one of the optical elements adjacent to the optical mark structure is fixed to the lens barrel while the curable liquid is cured.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: June 11, 2024
    Assignee: LARGAN PRECISION CO., LTD
    Inventors: Yu Chen Lai, Ming-Ta Chou, Liang Chieh Weng, Ming-Shun Chang
  • Publication number: 20240186123
    Abstract: Embodiments of substrate supports for process chambers are provided herein. In some embodiments, a substrate support for a process chamber includes: a pedestal having a support surface for supporting a substrate, one or more heating elements disposed therein, and a radio frequency (RF) electrode disposed therein; a hollow shaft coupled to a lower surface of the pedestal; and an RF rod extending through the hollow shaft and coupled to the RF electrode, wherein an impedance of the RF rod is less than about 0.2 ohms.
    Type: Application
    Filed: December 2, 2022
    Publication date: June 6, 2024
    Inventors: Yao-Hung YANG, Chih-Yang CHANG, Yikai CHEN, Rongping WANG
  • Publication number: 20240184236
    Abstract: Disclosed are a duplex document copying system and a method thereof applied to a manual operation for a document. A scanning device is connected to a processing device. The processing device stores one or more block pixel thresholds. After the scanning device obtains first scanning data and second scanning data from scanning the document, the processing device compares pixel difference information between the first scanning data and the second scanning data with the one or more block pixel thresholds to calculate a similarity between the first scanning data and the second scanning data so as to avoid repeated scans. In this way, it avoids the manual errors and outputting the repeatedly scanned document, thereby improving overall work efficiency and saving resources.
    Type: Application
    Filed: December 4, 2023
    Publication date: June 6, 2024
    Applicant: AVISION INC.
    Inventor: Chen-Chang LI
  • Publication number: 20240186453
    Abstract: A light-emitting device includes a semiconductor laminate, a first electrode and a second electrode. The semiconductor laminate has a mesa surface, an upper surface, a connecting surface that connects the upper surface and the mesa surface, and a lower surface opposite to the mesa surface and the upper surface. The semiconductor laminate includes a first semiconductor layer, an active layer, and a second semiconductor layer disposed in such order in a direction from the lower surface to the upper surface. The semiconductor laminate has at least one trench that extends from the mesa surface into the first semiconductor layer. The first electrode is electrically connected to the first semiconductor layer and formed on the mesa surface, and has an extending portion that extends into the trench. The second electrode is electrically connected to the second semiconductor layer and formed on the upper surface.
    Type: Application
    Filed: November 30, 2023
    Publication date: June 6, 2024
    Inventors: Gong CHEN, Jianbin CHEN, Yashu ZANG, Bin JIANG, Chung-Yin CHANG, Shaohua HUANG, Weichun TSENG
  • Publication number: 20240186397
    Abstract: In accordance with some aspects of the disclosure, a semiconductor structure is provided. The semiconductor structure includes: an active region; and a gate stack disposed on the active region. The gate stack includes: at least one gate dielectric layer disposed on the active region; and a metal gate structure disposed on the at least one gate dielectric layer. The metal gate structure includes: a metal gate layer comprising a first material; and at least one dummy structure disposed in the metal gate layer, the at least one dummy structure extending vertically through an entire thickness of the metal gate structure and comprising a second material. The second material is different from the first material.
    Type: Application
    Filed: February 24, 2023
    Publication date: June 6, 2024
    Inventors: Yu-Chen Chang, Anhao Cheng, Meng-I Kang, Yen-Liang Lin
  • Patent number: 12000407
    Abstract: A ceiling fan blade assembly structure includes a blade holder, multiple fan blades, and multiple locking assemblies. Multiple fan blade assembly portions are disposed at an outer side of the blade holder. Each fan blade assembly portion includes two first side plates parallel to each other, a first radial positioning portion, and two first vertical positioning portions disposed on the two first side plates. Each fan blade has a fan blade connection portion that includes two second side plates, a second radial positioning portion, and two second vertical positioning portions. The second and the first radial positioning portions are engaged with each other, and the two second and first vertical positioning portions are engaged with each other. Accordingly, the fan blade connection portion is preliminarily positioned on the fan blade assembly portion. Through the locking assembly, the first and the second radial positioning portions are locked together.
    Type: Grant
    Filed: July 13, 2023
    Date of Patent: June 4, 2024
    Assignee: HOTECK INC.
    Inventors: Lung-Fa Hsieh, Yu-Chen Hsieh, Min-Yuan Hsiao, Wen-Ting Tang, Hsin-Chu Chang, Ying-Pin Chiang
  • Patent number: 12002522
    Abstract: A memory device and an operation method thereof are provided. The operation method includes: in a programming operation, programming a plurality of threshold voltages of a plurality of switches on a plurality of string select lines and a plurality of ground select lines as a first reference threshold voltage, and programming a plurality of threshold voltages of a plurality of dummy memory cells on a plurality of dummy word lines as being gradually increased along a first direction or a second direction, and the threshold voltages of the dummy memory cells being higher than the first reference threshold voltage; wherein the first direction being from the string select lines to a plurality of word lines and the second direction being from the ground select lines to the word lines.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: June 4, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Tao-Yuan Lin, I-Chen Yang, Yao-Wen Chang
  • Patent number: 12003855
    Abstract: An optical image stabilization driver device includes an image sensor, a fixed carrier, a circuit element, an elastic element and a driving element. The circuit element includes a fixed part disposed on the fixed carrier, a movable part and an electrical transmission part. The image sensor is disposed on the movable part. The electrical transmission part has conductive routes electrically connected to the movable part and the fixed part. The elastic element includes a first frame part corresponding to the fixed part, a second frame part corresponding to the movable part and an elastic connection part connected to the first frame part and the second frame part and providing the image sensor with a freedom of movement in a plane. The driving element is configured to drive the image sensor to move relative the fixed carrier in the plane.
    Type: Grant
    Filed: August 3, 2022
    Date of Patent: June 4, 2024
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Chen-Yi Huang, Lin An Chang, Ming-Ta Chou
  • Publication number: 20240176093
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Application
    Filed: February 5, 2024
    Publication date: May 30, 2024
    Inventors: Chao-Chang HU, Chih-Wei WENG, Chia-Che WU, Chien-Yu KAO, Hsiao-Hsin HU, He-Ling CHANG, Chao-Hsi WANG, Chen-Hsien FAN, Che-Wei CHANG, Mao-Gen JIAN, Sung-Mao TSAI, Wei-Jhe SHEN, Yung-Ping YANG, Sin-Hong LIN, Tzu-Yu CHANG, Sin-Jhong SONG, Shang-Yu HSU, Meng-Ting LIN, Shih-Wei HUNG, Yu-Huai LIAO, Mao-Kuo HSU, Hsueh-Ju LU, Ching-Chieh HUANG, Chih-Wen CHIANG, Yu-Chiao LO, Ying-Jen WANG, Shu-Shan CHEN, Che-Hsiang CHIU
  • Publication number: 20240177269
    Abstract: A method of local implicit normalizing flow for arbitrary-scale image super-resolution, an associated apparatus and an associated computer-readable medium are provided. The method applicable to a processing circuit may include: utilizing the processing circuit to run a local implicit normalizing flow framework to start performing arbitrary-scale image super-resolution with a trained model of the local implicit normalizing flow framework according to at least one input image, for generating at least one output image, where a selected scale of the output image with respect to the input image is an arbitrary-scale; and during performing the arbitrary-scale image super-resolution with the trained model, performing prediction processing to obtain multiple super-resolution predictions for different locations of a predetermined space in a situation where a same non-super-resolution input image among the at least one input image is given, in order to generate the at least one output image.
    Type: Application
    Filed: November 24, 2023
    Publication date: May 30, 2024
    Applicant: MEDIATEK INC.
    Inventors: Jie-En Yao, Yi-Chen Lo, Li-Yuan Tsao, Shou-Yao Tseng, Chia-Che Chang, Chun-Yi Lee
  • Publication number: 20240178348
    Abstract: A light-emitting device includes: an epitaxial structure having a first surface and a second surface opposite to the first surface, and including a first type semiconductor layered unit that includes a first type window layer and a first type ohmic contact layer disposed at one side of the first type window layer; an active layer; and a second type semiconductor layered unit. The first type window layer is disposed between the first type ohmic contact layer and the active layer. The first type ohmic contact layer contains a material represented by Alx1Gay1InP, where 0?x1?1, 0?y1?1. The first type window layer contains a material represented by Alx2Gay2InP, where 0<x2?1, 0?y2?1. The first type ohmic contact layer has an Al content lower than an Al content of the first type window layer. A light-emitting apparatus that includes a light-emitting device according to the disclosure is also disclosed.
    Type: Application
    Filed: October 17, 2023
    Publication date: May 30, 2024
    Inventors: Weihuan LI, JInghua CHEN, Peng GAO, Fuyang NING, Xiaofeng LIU, Yu-Ren PENG, Huanshao KUO, Duxiang WANG, Chia-Hung CHANG
  • Publication number: 20240179903
    Abstract: Provided is a flash memory device including a gate stack structure, at least three channel pillars, a charge storage structure, at least three source line, and at least three bit lines. The gate stack structure is disposed above a substrate. The gate stack structure includes a plurality of gate layers and a plurality of insulating layers stacked alternately each other. The at least three channel pillars extend through the gate stack structure. The at least three channel pillars are electrically isolated from one another. The charge storage structure is disposed between the plurality of gate layers and the at least three channel pillars. The at least three source line are disposed below the gate stack structure and electrically connected to the at least three channel pillars. The at least three bit lines are disposed above the gate stack structure, and electrically connected to the at least three channel pillars.
    Type: Application
    Filed: November 25, 2022
    Publication date: May 30, 2024
    Applicant: Winbond Electronics Corp.
    Inventors: Frederick Chen, Wei-Che Chang