Abstract: A method of wireless communication is provided. The method includes transmitting an RRC system information request message to a cell; receiving a minimum required received level factor and an offset via system information, the offset being included in at least one of a SIB3 and a SIB4; obtaining a minimum required received level based on the minimum required received level factor and on the offset multiplied by an integer larger than one; determining a cell selection criterion based on the minimum required received level; and performing inter-frequency cell reselection according to the cell selection criterion when the offset is received in first neighboring cell related information for the inter-frequency cell reselection in the SIB4. A user equipment using such method is also provided.

Abstract: Disclosed embodiments relate to natural language processing. Techniques can include receiving input text, extracting, from the input text, at least one modifier and aspect pair, receiving data from a knowledgebase, based on the at least one modifier and aspect pair and commonsense data, generate one or more premise embeddings, convert the input text into tokens, generating at least one vector for one or more of the tokens based on an analysis of the tokens, combine the at least one vector with the one or more premise embeddings to create at least one combined vector, and analyze the at least one combined vector wherein the analysis generates an output indicative of a feature of the input text.

Abstract: Disclosed is 3D flash memory comprises a gate stack structure, an annular channel pillar, a first source/drain pillar, a second source/drain pillar and a charge storage structure. The gate stack structure is disposed on a dielectric base, and comprising a plurality of gate layers electrically insulated from each other. The annular channel pillar is disposed on the dielectric base and penetrating through the gate stack structure. The first source/drain pillar and the second source/drain pillar, disposed on the dielectric base, located within the annular channel pillar and penetrating through the gate stack structure, wherein the first source/drain pillar and the second source/drain pillar are separated from each other and are each connected to the annular channel pillar. The charge storage structure is disposed between each of the plurality of gate layers and the annular channel pillar. The first source/drain pillar and the second source/drain pillar are P-type doped.

Abstract: For a non-volatile memory that uses hard bit and soft bit data in error correction operations, to reduce the amount of soft bit data that needs to be transferred from a memory to the controller and improve memory system performance, the soft bit data can be compressed before transfer. After the soft bit data is read and stored into the internal data latches associated with the sense amplifiers, it is compressed within these internal data latches. The compressed soft bit data can then be transferred to the transfer data latches of a cache buffer, where the compressed soft bit data can be consolidated and transferred out over an input-output interface. Within the input-output interface, the compressed data can be reshuffled to put into logical user data order if needed.

Abstract: A interconnect system, including a plurality of sockets and a first interconnect interface. Any two of the sockets are accessible to each other's hardware resources by transmitting a first packet and a second packet through the first interconnect interface. The first packet includes first interconnect information, used for establishing communication between the two sockets. The second packet includes a first data payload, loaded from one of the two sockets. The sockets include a first socket and a second socket, configured to be interconnected with each other through the first interconnect interface.

Abstract: Various embodiments of the present disclosure are directed towards a trench capacitor with a trench pattern for yield improvement. The trench capacitor is on a substrate and comprises a plurality of capacitor segments. The capacitor segments extend into the substrate according to the trench pattern and are spaced with a pitch on an axis. The plurality of capacitor segments comprises an edge capacitor segment at an edge of the trench capacitor and a center capacitor segment at a center of the trench capacitor. The edge capacitor segment has a greater width than the center capacitor segment and/or the pitch is greater at the edge capacitor segment than at the center capacitor segment. The greater width may facilitate stress absorption and the greater pitch may increase substrate rigidity at the edge of the trench capacitor where thermal expansion stress is greatest, thereby reducing substrate bending and trench burnout for yield improvements.

Abstract: A method of cell reselection in a non-public network (NPN) for a user equipment (UE) is provided. The method includes receiving, from a first cell via a first System Information Block 1 (SIB1), a first network identity associated with a first indication, receiving, from a second cell via a second SIB1, a second network identity associated with a second indication, selecting one of the first network identity and the second network identity, determining whether the first indication is present and whether the first network identity is selected by the UE, determining the first cell as barred for the cell reselection when the first indication is present, but the first network identity is not selected by the UE, and determining the first cell as a candidate cell for the cell reselection when the first indication is present and the first network identity is selected by the UE.

Abstract: Disclosed are a pharmaceutical composition and method for relieving/eliminating morphine-induced analgesic tolerance. The pharmaceutical composition includes a therapeutically effective amount of a short peptide and morphine as active ingredients, and a pharmaceutically-acceptable carrier. The short peptide is a peptide consisting of an amino acid sequence shown in SEQ ID NO: 1 or a pharmaceutically-acceptable salt thereof. In the method, the short peptide and morphine are administered to a subject simultaneously; or the short peptide is injected to the subject followed by administration of the morphine; or a pharmaceutical composition including the short peptide and morphine is administered to the subject.

Abstract: An electric vehicle transmission mechanism which is applied to drive a chain wheel of an electric vehicle is provided. The electric vehicle transmission mechanism includes a transmission shaft, an output shaft, a lower bearing and an upper bearing. The transmission shaft is connected to the chain wheel and has a transmission axial direction, and the transmission shaft includes a transmission portion. The output shaft includes an output portion engaged with the transmission portion, and the output shaft has an output axial direction substantially perpendicular to the transmission axial direction. The lower bearing is sleeved on the output shaft. The upper bearing is sleeved on the output shaft and located between the lower bearing and the output portion.

Abstract: A valve body including an outer wall, an inner wall, and a connecting wall is provided. The outer wall has a first upper surface, a first side surface, and a second side surface. At least one of the first side surface and the second side surface has a fluid hole. The inner wall is disposed within the outer wall. The inner wall shields the at least one fluid hole. A third side surface has an inner opening. The connecting wall is disposed within the outer wall. The connecting wall connects the inner opening of the inner wall and the fluid hole of the outer wall. Furthermore, an electromagnet switch valve and a bed structure are also provided.

Abstract: A user equipment (UE) and a method for multicast/broadcast services (MBS) are provided. The method includes receiving, from a base station (BS), a Radio Resource Control (RRC) message that indicates a search space dedicated for the MBS; and monitoring MBS Downlink Control Information (DCI) for MBS-related control information in a control resource set (CORESET) in the search space dedicated for the MBS. The MBS DCI includes a DCI format with cyclic redundancy check (CRC) scrambled by a Radio Network Temporary Identifier (RNTI) related to the MBS.

Abstract: A stereoscopic display system and a control method of the stereoscopic display system are provided. A rotation device is controlled to rotate at 2n times an image input frequency, so that the rotation device respectively completes n rotations during a period in which stereoscopic glasses receive a left-eye image and a period in which the stereoscopic glasses receive a right-eye image.

Abstract: A method includes determining, by a computer device, device information for a network device communicatively coupled to the computer device. The method includes retrieving, from a server device, a configuration file corresponding to the device information as determined. The method includes resetting the network device using the configuration file as retrieved. The method includes clearing user-addressable storage locations of the network device. The method includes outputting an indication of whether resetting the network device was successful and whether clearing the user-addressable storage locations of the network device was successful.

Abstract: Methods and apparatuses for handling measurement operations in a wireless communication system are provided. A method performed by a User Equipment (UE) includes receiving a first measurement configuration from a first serving cell; performing, in a first Radio Resource Control (RRC) state which is an RRC idle state or an RRC inactive state, a first measurement operation based on the first measurement configuration; generating a first measurement result; receiving a first measurement report request from a second serving cell; retaining the first measurement result after the UE transitions from the first RRC state to a second RRC state which is an RRC connected state; and transmitting the first measurement result to the second serving cell, wherein the first serving cell and the first RRC state are associated with a first Radio Access Technology (RAT) and the second serving cell and the second RRC state are associated with a second RAT.

Abstract: For a non-volatile memory that uses hard bit and soft bit data in error correction operations, to reduce the amount of soft bit data that needs to be transferred from a memory to the controller and improve memory system performance, the soft bit data can be compressed before transfer. After the soft bit data is read and stored into the internal data latches associated with the sense amplifiers, it is compressed within these internal data latches. The compressed soft bit data can then be transferred to the transfer data latches of a cache buffer, where the compressed soft bit data can be consolidated and transferred out over an input-output interface. Within the input-output interface, the compressed data can be reshuffled to put into logical user data order if needed.

Abstract: A method for a Conditional Primary Secondary Cell Group (SCG) Cell (PSCell) Change (CPC) procedure performed by a master node is provided. The method includes receiving, from a user equipment (UE), a UE capability report indicating that the UE supports conditional reconfiguration for a PSCell change; transmitting, to the UE, a first conditional reconfiguration for changing from a source PSCell to a target PSCell in an SCG portion of a radio resource control (RRC) reconfiguration message, the first conditional reconfiguration including a configuration of the target PSCell and an execution condition; and receiving, from the UE, a response message after the first conditional reconfiguration is applied by the UE. The first conditional reconfiguration enables the UE to evaluate the execution condition, and apply the configuration of the target PSCell and synchronize to the target PSCell after the execution condition is evaluated as satisfied.

Abstract: A preparation method for a spherical silica powder filler comprises the following steps: S1, providing spherical polysiloxane comprising a T unit by means of a hydrolysis condensation reaction of R1SiX3, wherein R1 is hydrogen atom or an organic group having independently selectable 1 to 18 carbon atoms, X is a hydrolyzable group, and T unit is R1SiO3—; and S2, calcining the spherical polysiloxane under the condition of a dry oxidizing gas atmosphere, the calcining temperature being between 850° C. and 1200° C., so as to obtain the spherical silica powder filler which does not contain silica particles of which the diameter is less than 50 nanometers. The spherical silica powder filler does not contain silica particles of which the diameter is less than 50 nanometers, has a low dielectric loss and a low thermal expansion coefficient, and is suitable for high-frequency high-speed circuit boards, prepregs or copper clad laminates, etc.

Abstract: According to an aspect of an embodiment, operations may comprise obtaining a pose graph that comprises a plurality of nodes. The operations may also comprise dividing the pose graph into a plurality of pose subgraphs, each pose subgraph comprising one or more respective pose subgraph interior nodes and one or more respective pose subgraph boundary nodes. The operations may also comprise generating one or more boundary subgraphs based on the plurality of pose subgraphs, each of the one or more boundary subgraphs comprising one or more respective boundary subgraph boundary nodes and comprising one or more respective boundary subgraph interior nodes. The operations may also comprise obtaining an optimized pose graph by performing a pose graph optimization. The pose graph optimization may comprise performing a pose subgraph optimization of the plurality of pose subgraphs and performing a boundary subgraph optimization of the plurality of boundary subgraphs.

Abstract: A DC switch with embedded de-multiplexing function links a plurality of DC switches in a priority chain and enables concurrent power switching between DC switches. The priority chain automatically selects a most cost-effective power for output to optimize energy utilization efficiency and with a just-in-time enable to activate standby-power to minimize energy waste in persistent DC power.