Patents by Inventor Chen-Cheng Chang

Chen-Cheng Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170543
    Abstract: A method of fabricating a semiconductor structure includes selective use of a cladding layer during the fabrication process to provide critical dimension uniformity. The cladding layer can be formed before forming a recess in an active channel structure or can be formed after filling a recess in an active channel structure with dielectric material. These techniques can be used in semiconductor structures such as gate-all-around (GAA) transistor structures implemented in an integrated circuit.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu KAO, Shih-Yao LIN, Chen-Ping CHEN, Chih-Han LIN, Ming-Ching CHANG, Chao-Cheng CHEN
  • Publication number: 20240113080
    Abstract: A semiconductor device and a method of manufacture are provided. In particular, a semiconductor device using blocks, e.g., discrete connection blocks, having through vias and/or integrated passive devices formed therein are provided. Embodiments such as those disclosed herein may be utilized in PoP applications. In an embodiment, the semiconductor device includes a die and a connection block encased in a molding compound. Interconnection layers may be formed on surfaces of the die, the connection block and the molding compound. One or more dies and/or packages may be attached to the interconnection layers.
    Type: Application
    Filed: November 30, 2023
    Publication date: April 4, 2024
    Inventors: Ching-Wen Hsiao, Chen-Shien Chen, Wei Sen Chang, Shou-Cheng Hu
  • Patent number: 11942652
    Abstract: The disclosure provides a limit device and a robot using the same. The limit device comprises a first connecting member, a transmission rod and a second connecting member. The first connecting member comprising a first main body portion and two first connecting elements. The two first connecting elements are arranged at intervals. The two first connecting elements are respectively connected to the first main body. The transmission rod comprising a first end and a second end. The first end and the second end are arranged at intervals. The first end penetrates through one of the two first connecting elements. The second end penetrates through the other one of the two first connecting element. The second connecting member provided with two indexing buckles. The two indexing buckles are arranged at intervals, each of the indexing buckles comprises a first limiting groove and a second limiting groove.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: March 26, 2024
    Assignees: Futaijing Precision Electronics (Yantai) Co., Ltd., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Chen-Ting Kao, Chi-Cheng Wen, Yu-Sheng Chang, Chih-Cheng Lee, Chiung-Hsiang Wu, Sheng-Li Yen, Yu-Cheng Zhang, Chang-Ju Hsieh, Chen Chao
  • Publication number: 20240096705
    Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu Kao, Chen-Yui Yang, Hsien-Chung Huang, Chao-Cheng Chen, Shih-Yao Lin, Chih-Chung Chiu, Chih-Han Lin, Chen-Ping Chen, Ke-Chia Tseng, Ming-Ching Chang
  • Publication number: 20240096757
    Abstract: An integrated circuit (IC) die includes first through third adjacent rows of through-silicon vias (TSVs), and first and second adjacent rows of memory macros. TSVs of the first row of TSVs extend through and are electrically isolated from memory macros of the first row of memory macros. TSVs of the third row of TSVs extend through and are electrically isolated from memory macros of the second row of memory macros.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Inventors: Hidehiro FUJIWARA, Tze-Chiang HUANG, Hong-Chen CHENG, Yen-Huei CHEN, Hung-Jen LIAO, Jonathan Tsung-Yung CHANG, Yun-Han LEE, Lee-Chung LU
  • Publication number: 20240097216
    Abstract: The present invention discloses a detection device and a probe module thereof, wherein an electrical connection path between a battery detection frame and a battery under test is provided via the probe module. The probe module includes a base, a first polarity plate, a second polarity plate, a first upper connection group, a second upper connection group, a first lower connection member and a second lower connection member. Via the first polarity plate, the first upper connection group is correspondingly coupled to the battery detection frame, and the first lower connection member is correspondingly coupled to the battery under test. Via the second polarity plate, the second upper connection group is correspondingly coupled to the battery detection frame, and the second lower connection member is correspondingly coupled to the battery under test. Thus, it is not necessary to process a cable having been fixed on the battery detection frame when the probe module is replaced.
    Type: Application
    Filed: June 8, 2023
    Publication date: March 21, 2024
    Inventors: CHUAN-TSE LIN, CHEN-CHOU WEN, SHIH-CHIN TAN, WEN-CHUAN CHANG, YING-CHENG CHEN
  • Publication number: 20230420264
    Abstract: A method for manufacturing a semiconductor device is provided. The method includes: providing a substrate comprising an array region and a peripheral region, wherein the array region and the peripheral region define a stepped structure, performing a deposition process to form a passivation layer over the array region and the peripheral region; performing an etching process to remove a portion of the passivation layer over the array region; and performing a chemical mechanical polishing process so that the passivation layer has a substantially continuous surface over the array region and the peripheral region.
    Type: Application
    Filed: June 23, 2022
    Publication date: December 28, 2023
    Inventor: CHEN-CHENG CHANG
  • Publication number: 20230422490
    Abstract: A method for manufacturing a semiconductor device is provided. The method includes: providing a substrate comprising an array region and a peripheral region, wherein the array region and the peripheral region define a stepped structure, performing a deposition process to form a passivation layer over the array region and the peripheral region; performing an etching process to remove a portion of the passivation layer over the array region; and performing a chemical mechanical polishing process so that the passivation layer has a substantially continuous surface over the array region and the peripheral region.
    Type: Application
    Filed: June 23, 2022
    Publication date: December 28, 2023
    Inventor: CHEN-CHENG CHANG
  • Patent number: 6874625
    Abstract: A slim storage casing able to hold two optical disks. The upper and the lower casing each have a central straddling respectively formed at the time of molding, such that two optical disks, using the-center hole of the optical disk, can be coupled to the central straddling at the upper and the lower casing respectively and stored in the storage casing. The upper and the lower casing according to the invention has a thickness of about 5 mm to 5.5 mm when coupled together.
    Type: Grant
    Filed: October 22, 2002
    Date of Patent: April 5, 2005
    Assignee: CMC Magnetics Corporation
    Inventor: Chen-Cheng Chang
  • Publication number: 20030102233
    Abstract: A slim type storage casing for two pieces of optical disks is provided according to the invention wherein the storage casing has an upper and a lower casing whereas the optical disk has a center hole. The upper and the lower casing will have a central straddling respectively as soon as forming ejection is completed, such that the two pieces of optical disks, using the center hole at the optical disk, can be coupled to the central straddling at the upper and the lower casing respectively and stored at the storage casing. The upper and the lower casing according to the invention has a thickness of about 5 mm to 5.5 mm when coupled together.
    Type: Application
    Filed: October 22, 2002
    Publication date: June 5, 2003
    Inventor: Chen-Cheng Chang
  • Patent number: 6283282
    Abstract: A low-profile compact disk (CD) case includes pivotally connected top cover and bottom seat to provide an inner space for receiving a compact disk therein. The bottom seat is integrally formed on an inner surface with a central holding means and a plurality of protective means. The central holding means is a short hollow cylinder upward projected from the bottom seat and has spaced cuts along its circumferential wall to provide a plurality of flexible catch pawls for holding a compact disk in place. First and second protective means are low-raised ribs for supporting and preventing the compact disk from direct contact with the bottom seat, and the third protective means are raised curved ribs higher than the first and the second ribs and the compact disk for protecting the compact disk from compression by the top cover. No extra CD deck is required and an overall height or thickness and production costs of the CD case can therefore be largely reduced.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: September 4, 2001
    Assignee: CMC Magnetics Corporation
    Inventors: Ming-Sen Wong, Chen-Cheng Chang
  • Patent number: 6283280
    Abstract: A compact disc container includes a box defining a unitary space in which a tube projects upwardly from a bottom center thereof. A seat located around a lower outer end of the tube extends upwardly from a bottom surface of the box. The tube has a locking hole provided near a top thereof for a locking knob to engage and tighten thereto. More than one compact disc may be superimposed in the box around the tube with a lowermost compact disc supported on the seat without frictionally contacting the bottom surface of the box. The locking knob is tightened to the locking hole in the tube and locates the superimposed compact discs in the box. The unitary space of the box allows accommodation of more than one compact disc and effectively reduces costs otherwise needed for packing the compact discs individually.
    Type: Grant
    Filed: February 24, 2000
    Date of Patent: September 4, 2001
    Assignee: CMC Magnetics Corporation
    Inventors: Ming-Sen Wong, Chen-Cheng Chang