Patents by Inventor Chen-Cheng Lin
Chen-Cheng Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240395929Abstract: A semiconductor device includes a gate structure, a first doped region, a second doped region, an isolation structure, an insulating layer and a field plate. The gate structure is located on a substrate. The first doped region and the second doped region are located at two sides of the gate structure. The isolation structure is located in the substrate between the first doped region and the second doped region, and is separated from the gate structure by a non-zero distance. The insulating layer extends continuously from a portion of a top surface of the gate structure to a portion of a top surface of the isolation structure. The field plate is located on the insulating layer and has the same potential as the gate structure.Type: ApplicationFiled: June 19, 2023Publication date: November 28, 2024Applicant: United Microelectronics Corp.Inventors: Chen-Yuan Lin, Yu-Cheng Lo, Tzu-Yun Chang
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Publication number: 20240389213Abstract: A dispensing system includes a dispense material supply that contains a dispense material and a dispensing pump connected downstream from the dispense material supply. The dispensing pump includes a body made of a first electrically conductive material, one or more first electrical contacts that are disposed on the body of the dispensing pump, and one or more first connection wires that are coupled between each one of the one or more first electrical contacts and ground. The dispensing system also includes a dispensing nozzle connected downstream from the dispensing pump and includes a tube made of a second electrically conductive material, one or more second electrical contacts that are disposed on an outer surface of the tube, and one or more second connection wires that are coupled between each one of the one or more second electrical contacts and the ground.Type: ApplicationFiled: July 29, 2024Publication date: November 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tzu-Yang LIN, Yu-Cheng CHANG, Cheng-Han WU, Shang-Sheng LI, Chen-Yu LIU, Chen Yi HSU
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Publication number: 20240387680Abstract: A semiconductor device is disclosed. The semiconductor device includes a substrate including a semiconductor material. The semiconductor device includes a conduction channel of a transistor disposed above the substrate. The conduction channel and the substrate include a similar semiconductor material. The semiconductor device includes a source/drain region extending from an end of the conduction channel. The semiconductor device includes a dielectric structure. The source/drain region is electrically coupled to the conduction channel and electrically isolated from the substrate by the dielectric structure.Type: ApplicationFiled: July 29, 2024Publication date: November 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Ping Chen, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
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Publication number: 20240387393Abstract: A device includes an interposer, which includes a substrate having a top surface. An interconnect structure is formed over the top surface of the substrate, wherein the interconnect structure includes at least one dielectric layer, and metal features in the at least one dielectric layer. A plurality of through-substrate vias (TSVs) is in the substrate and electrically coupled to the interconnect structure. A first die is over and bonded onto the interposer. A second die is bonded onto the interposer, wherein the second die is under the interconnect structure.Type: ApplicationFiled: July 29, 2024Publication date: November 21, 2024Inventors: Hsien-Pin Hu, Chen-Hua Yu, Ming-Fa Chen, Jing-Cheng Lin, Jiun Ren Lai, Yung-Chi Lin
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Publication number: 20240387447Abstract: A method for forming a semiconductor device is provided. The method includes forming first bonding features and a first alignment mark including first patterns in a top die and forming second bonding features and a second alignment mark in a bottom wafer. The method also includes determining a first benchmark and a second benchmark. The method further includes aligning the top die with the bottom wafer using the first alignment mark and the second alignment mark. In a top view, at least two of the first patterns are oriented along a first direction, and at least two of the first patterns are oriented along a second direction that is different from the first direction. The top die is aligned with the bottom wafer by adjusting a virtual axis passing through the first benchmark and the second benchmark to be substantially parallel with the first direction.Type: ApplicationFiled: May 16, 2023Publication date: November 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Geng-Ming CHANG, Chih-Hang TUNG, Chen-Hua YU, Kuo-Chung Yee, Kewei ZUO, Shou-Yi Wang, Tzu-Cheng LIN, Shih-Wei LIANG
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Publication number: 20240379429Abstract: Some embodiments of the present disclosure provide a method of manufacturing a semiconductor device. The method includes: forming a carrier; forming a sacrificial layer on the carrier; forming a through via on the sacrificial layer, wherein the through via includes a seed layer and a metal feature; disposing a die on the sacrificial layer, wherein the die has a plurality of metal pillars disposed at a side of the die facing away from the sacrificial layer; forming a molding compound on the sacrificial layer to cover and surround the die and the through via; removing a portion of the molding compound and a portion of the through via above the die to expose the metal feature of the through via; and removing the carrier and sacrificial layer to expose the seed layer of the through via.Type: ApplicationFiled: July 23, 2024Publication date: November 14, 2024Inventors: JING-CHENG LIN, YING-CHING SHIH, PU WANG, CHEN-HUA YU
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Patent number: 12134159Abstract: A workpiece orientation mechanism includes: a driving device including a transmission motor and a controller which are connected with each other via signal, the transmission motor defining an axial direction; a rotating seat, combined with the transmission motor, and capable of being driven to rotate by the transmission motor; an orientation head disposed on the rotating seat to rotate synchronously with the rotating seat, wherein the orientation head is capable of moving along the axial direction relative to the rotating seat, one end of the orientation head includes a mounting head, and a blocking member is disposed on the orientation head; reset means, arranged between the rotating seat and the orientation head, and positioning the orientation head at a predetermined position; and a sensor facing the blocking member, wherein the sensor is signally connected with the controller.Type: GrantFiled: June 29, 2021Date of Patent: November 5, 2024Assignee: Hiwin Technologies Corp.Inventors: Chen-Yu Hsieh, Jhao-Jhong Su, Bo-Chen Lin, Kuo-Cheng Huang
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Patent number: 12136657Abstract: A semiconductor device is disclosed. The semiconductor device includes a substrate including a semiconductor material. The semiconductor device includes a conduction channel of a transistor disposed above the substrate. The conduction channel and the substrate include a similar semiconductor material. The semiconductor device includes a source/drain region extending from an end of the conduction channel. The semiconductor device includes a dielectric structure. The source/drain region is electrically coupled to the conduction channel and electrically isolated from the substrate by the dielectric structure.Type: GrantFiled: June 29, 2023Date of Patent: November 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chen-Ping Chen, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
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Publication number: 20240355691Abstract: A semiconductor package including a circuit substrate, an interposer structure, a plurality of dies, and an insulating encapsulant is provided. The interposer structure is disposed on the circuit substrate. The plurality of dies is disposed on the interposer structure, wherein the plurality of dies is electrically connected to the circuit substrate through the interposer structure. The insulating encapsulant is disposed on the circuit substrate, wherein the insulating encapsulant surrounds the plurality of dies and the interposer structure and encapsulates at least the interposer structure, the insulating encapsulant has a groove that surrounds the interposer structure and the plurality of dies, and the interposer structure and the plurality of dies are confined to be located within the groove.Type: ApplicationFiled: July 1, 2024Publication date: October 24, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Cheng Lin, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu, Chih-Wei Lin
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Publication number: 20240338097Abstract: A touch display device includes a reflective display module, a touch sensing layer, a light guide member, a ground shielding layer, and a first adhesive layer. The touch sensing layer is disposed on a display surface of the reflective display module, and the light guide member is disposed between the reflective display module and the touch sensing layer. The ground shielding layer is in contact with the light guide member and located between the light guide member and the touch sensing layer. The ground shielding layer electrically connects to one of the reflective display module and the touch sensing layer to electrically connect to a ground potential through the one of the reflective display module and the touch sensing layer. The first adhesive layer is disposed between the light guide member and the reflective display module, and is located between the ground shielding layer and the reflective display module.Type: ApplicationFiled: June 20, 2024Publication date: October 10, 2024Applicant: E Ink Holdings Inc.Inventors: Chen Cheng Lin, Hung Wei Tseng, Fang Chia Hu
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Publication number: 20240329361Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a circuit assembly. The movable assembly is configured to connect an optical element, the movable assembly is movable relative to the fixed assembly, and the optical element has an optical axis. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The circuit assembly includes a plurality of circuits and is affixed to the fixed assembly.Type: ApplicationFiled: June 7, 2024Publication date: October 3, 2024Inventors: Sin-Hong LIN, Yung-Ping YANG, Wen-Yen HUANG, Yu-Cheng LIN, Kun-Shih LIN, Chao-Chang HU, Yung-Hsien YEH, Mao-Kuo HSU, Chih-Wei WENG, Ching-Chieh HUANG, Chih-Shiang WU, Chun-Chia LIAO, Chia-Yu CHANG, Hung-Ping CHEN, Wei-Zhong LUO, Wen-Chang LIN, Shou-Jen LIU, Shao-Chung CHANG, Chen-Hsin HUANG, Meng-Ting LIN, Yen-Cheng CHEN, I-Mei HUANG, Yun-Fei WANG, Wei-Jhe SHEN
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Publication number: 20240332411Abstract: In some embodiments, the present disclosure relates to a semiconductor device. The semiconductor device includes a channel layer over a base substrate and an active layer over the channel layer. A source and a drain are over the active layer. A gate is over the active layer and laterally between the source and the drain. A dielectric is over the active layer and laterally surrounds the source, the drain, and the gate. A cap structure laterally contacts the source and is disposed laterally between the gate and the source. The source vertically extends to a top of the cap structure.Type: ApplicationFiled: June 11, 2024Publication date: October 3, 2024Inventors: Ming-Cheng Lin, Chen-Bau Wu, Chun Lin Tsai, Haw-Yun Wu, Liang-Yu Su, Yun-Hsiang Wang
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Patent number: 12100757Abstract: In some embodiments, the present disclosure relates to a method of forming a high electron mobility transistor (HEMT) device. The method includes forming a passivation layer over a substrate. A source contact and a drain contact are formed within the passivation layer. A part of the passivation layer is removed to form a cavity. The cavity has a lower portion formed by a first sidewall and a second sidewall of the passivation layer and an upper portion formed by the first sidewall of the passivation layer and a sidewall of the source contact. A gate structure is formed within the passivation layer between the drain contact and the cavity. A cap structure is formed within the cavity.Type: GrantFiled: July 7, 2023Date of Patent: September 24, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ming-Cheng Lin, Chen-Bau Wu, Chun Lin Tsai, Haw-Yun Wu, Liang-Yu Su, Yun-Hsiang Wang
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Publication number: 20240312980Abstract: A semiconductor structure and method of manufacture is provided. In some embodiments, a semiconductor structure includes a first doped well doped with a first impurity having a first conductivity type, a second doped well adjacent the first doped well and doped with a second impurity having a second conductivity type opposite the first conductivity type, a third doped well adjacent the second doped well and doped with a third impurity having the first conductivity type, a fourth doped region in the third doped well and doped with a fourth impurity having the second conductivity type, and a deep doped well doped with a fifth impurity having the first conductivity type under a first portion of the second doped well, under the third doped well, and under the fourth doped region.Type: ApplicationFiled: March 16, 2023Publication date: September 19, 2024Inventors: Hung-Chou LIN, Yi-Cheng CHIU, Chen-Chien CHANG, Kang-Tai PENG, Tian Sheng LIN
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Publication number: 20240310964Abstract: A touch display device includes a substrate, a display element layer, a composite substrate, a touch electrode and an adhesive layer. The display element layer is disposed on the substrate. The composite substrate includes a support layer and a moisture barrier layer. The moisture barrier layer is in direct contact with and covers a surface of the support layer. The display element layer is located between the substrate and the composite substrate. A moisture transmission rate of the moisture barrier layer is less than 1×10?2 g/m2/day. The touch electrode is disposed on the composite substrate. The adhesive layer is disposed between the display element layer and the composite substrate.Type: ApplicationFiled: November 29, 2023Publication date: September 19, 2024Applicant: E Ink Holdings Inc.Inventors: Chen Cheng Lin, Hung Wei Tseng, Yi Chun Kuo, Fang Chia Hu
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Publication number: 20240290903Abstract: A light sensing transistor is provided. The light sensing transistor includes a substrate, a metal layer, and a semiconductor layer. The metal layer and the semiconductor layer are disposed on the substrate. The metal layer has a first metal structure and a second metal structure. The first metal structure and the second metal structure are in direct contact with the semiconductor layer.Type: ApplicationFiled: July 4, 2023Publication date: August 29, 2024Applicant: Novatek Microelectronics Corp.Inventors: Ya-Hsiang Tai, Yi-Cheng Yuan, Chen-Yu Lin
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Patent number: 12073038Abstract: A touch display device includes a driving substrate, a display medium layer, a common electrode layer, a touch electrode layer, and a protective layer. The display medium layer is disposed on the driving substrate. The common electrode layer is in direct contact with and disposed on the display medium layer. The common electrode layer includes multiple common electrodes, and two adjacent of the common electrodes have a spacing between each other. The touch electrode layer is disposed on the display medium layer. The touch electrode layer and the common electrode layer define a touch structure layer. The protective layer is disposed on the touch electrode layer.Type: GrantFiled: March 13, 2023Date of Patent: August 27, 2024Assignee: E Ink Holdings Inc.Inventors: Chen Cheng Lin, Mondal Somnath, Fang Chia Hu, Hung Wei Tseng
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Publication number: 20240264701Abstract: The invention provides a touch display device and an operation method for the touch display device. The touch display device includes an integrated control circuit and a touch driver. The integrated control circuit is coupled to the touch driver. The integrated control circuit outputs a first synchronization signal to the touch driver. The touch driver outputs a touch mode signal to the integrated control circuit, so that the integrated control circuit generates a synchronization enabling signal to the touch driver according to the touch mode signal.Type: ApplicationFiled: December 21, 2023Publication date: August 8, 2024Applicant: E Ink Holdings Inc.Inventors: Hung Wei Tseng, Yi Chun Kuo, Chen Cheng Lin
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Publication number: 20240266298Abstract: A fan-out package having a main die and a dummy die side-by-side is provided. A molding material is formed along sidewalls of the main die and the dummy die, and a redistribution layer having a plurality of vias and conductive lines is positioned over the main die and the dummy die, where the plurality of vias and the conductive lines are electrically connected to connectors of the main die.Type: ApplicationFiled: March 26, 2024Publication date: August 8, 2024Inventors: Yan-Fu Lin, Chen-Hua Yu, Meng-Tsan Lee, Wei-Cheng Wu, Hsien-Wei Chen
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Publication number: 20240264405Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.Type: ApplicationFiled: April 16, 2024Publication date: August 8, 2024Inventors: Chao-Chang HU, Liang-Ting HO, Chen-Er HSU, Yi-Liang CHAN, Fu-Lai TSENG, Fu-Yuan WU, Chen-Chi KUO, Ying-Jen WANG, Wei-Han HSIA, Yi-Hsin TSENG, Wen-Chang LIN, Chun-Chia LIAO, Shou-Jen LIU, Chao-Chun CHANG, Yi-Chieh LIN, Shang-Yu HSU, Yu-Huai LIAO, Shih-Wei HUNG, Sin-Hong LIN, Kun-Shih LIN, Yu-Cheng LIN, Wen-Yen HUANG, Wei-Jhe SHEN, Chih-Shiang WU, Sin-Jhong SONG, Che-Hsiang CHIU, Sheng-Chang LIN