Patents by Inventor Chen-Chih Hsieh

Chen-Chih Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9589915
    Abstract: A semiconductor device includes a substrate defined with a seal ring region and a circuit region, the substrate includes a seal ring structure and an integrated circuit structure, the seal ring structure is disposed in the seal ring region and includes a plurality of stacked conductive layers interconnected by a plurality of via layers, the integrated circuit structure is disposed in the circuit region and includes an active or a passive device; a metal pad disposed over the seal ring region and contacted with the seal ring structure; a passivation layer disposed over the substrate and covering the metal pad; a polymeric layer disposed over the passivation layer and the circuit region; and a molding disposed over the passivation layer and the polymeric layer, wherein the seal ring structure is covered by the molding.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: March 7, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tsung-Yuan Yu, Hao-Yi Tsai, Chao-Wen Shih, Wen-Hsin Chan, Chen-Chih Hsieh
  • Patent number: 9379076
    Abstract: A method of manufacturing a semiconductor structure includes receiving a substrate including a die pad disposed thereon; disposing a passivation over the substrate and around the die pad; disposing a polymer over the passivation; forming a post passivation interconnect (PPI) including an elongated portion and a via portion contacting with the die pad; depositing a metallic paste on the elongated portion of the PPI by a stencil; disposing a conductive bump over the metallic paste; and disposing a molding over the PPI and around the metallic paste and the conductive bump.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: June 28, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chen-Chih Hsieh, Hao-Yi Tsai, Chao-Wen Shih, Yung-Ping Chiang, Tsung-Yuan Yu
  • Patent number: 9343415
    Abstract: In a method for forming a packaging structure, a metal pad is formed on a semiconductor substrate, and a first polymer insulating layer is formed over the semiconductor substrate. An opening passing through the first polymer insulating layer is formed to expose a portion of the metal pad. A copper-containing material is deposited in the opening and over the first polymer insulating layer, thereby forming a copper-containing layer having a first thickness and a first width over the first polymer insulating layer. A conductive bump having a second width is formed over the copper-containing layer, in which the second width is smaller than the first width. An exposed portion of the copper-containing layer is etched using the conductive bump as a mask until the exposed portion is reduced to a second thickness, thereby forming a monolithic copper-containing structure.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: May 17, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chao-Wen Shih, Yung-Ping Chiang, Chen-Chih Hsieh, Hao-Yi Tsai
  • Publication number: 20160099223
    Abstract: A method of manufacturing a semiconductor structure includes receiving a substrate including a die pad disposed thereon; disposing a passivation over the substrate and around the die pad; disposing a polymer over the passivation; forming a post passivation interconnect (PPI) including an elongated portion and a via portion contacting with the die pad; depositing a metallic paste on the elongated portion of the PPI by a stencil; disposing a conductive bump over the metallic paste; and disposing a molding over the PPI and around the metallic paste and the conductive bump.
    Type: Application
    Filed: October 1, 2014
    Publication date: April 7, 2016
    Inventors: CHEN-CHIH HSIEH, HAO-YI TSAI, CHAO-WEN SHIH, YUNG-PING CHIANG, TSUNG-YUAN YU
  • Publication number: 20160020181
    Abstract: A semiconductor device includes a substrate defined with a seal ring region and a circuit region, the substrate includes a seal ring structure and an integrated circuit structure, the seal ring structure is disposed in the seal ring region and includes a plurality of stacked conductive layers interconnected by a plurality of via layers, the integrated circuit structure is disposed in the circuit region and includes an active or a passive device; a metal pad disposed over the seal ring region and contacted with the seal ring structure; a passivation layer disposed over the substrate and covering the metal pad; a polymeric layer disposed over the passivation layer and the circuit region; and a molding disposed over the passivation layer and the polymeric layer, wherein the seal ring structure is covered by the molding.
    Type: Application
    Filed: July 17, 2014
    Publication date: January 21, 2016
    Inventors: TSUNG-YUAN YU, HAO-YI TSAI, CHAO-WEN SHIH, WEN-HSIN CHAN, CHEN-CHIH HSIEH
  • Publication number: 20150228597
    Abstract: In a method for forming a packaging structure, a metal pad is formed on a semiconductor substrate, and a first polymer insulating layer is formed over the semiconductor substrate. An opening passing through the first polymer insulating layer is formed to expose a portion of the metal pad. A copper-containing material is deposited in the opening and over the first polymer insulating layer, thereby forming a copper-containing layer having a first thickness and a first width over the first polymer insulating layer. A conductive bump having a second width is formed over the copper-containing layer, in which the second width is smaller than the first width. An exposed portion of the copper-containing layer is etched using the conductive bump as a mask until the exposed portion is reduced to a second thickness, thereby forming a monolithic copper-containing structure.
    Type: Application
    Filed: April 20, 2015
    Publication date: August 13, 2015
    Inventors: Chao-Wen SHIH, Yung-Ping CHIANG, Chen-Chih HSIEH, Hao-Yi TSAI
  • Patent number: 9035468
    Abstract: In a method for forming a packaging structure, a metal pad is formed on a semiconductor substrate, and a first polymer insulating layer is formed over the semiconductor substrate. An opening passing through the first polymer insulating layer is formed to expose a portion of the metal pad. A copper-containing material is deposited in the opening and over the first polymer insulating layer, thereby forming a copper-containing layer having a first thickness and a first width over the first polymer insulating layer. A conductive bump having a second width is formed over the copper-containing layer, in which the second width is smaller than the first width. An exposed portion of the copper-containing layer is etched using the conductive bump as a mask until the exposed portion is reduced to a second thickness, thereby forming a monolithic copper-containing structure.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: May 19, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chao-Wen Shih, Yung-Ping Chiang, Chen-Chih Hsieh, Hao-Yi Tsai
  • Publication number: 20150035139
    Abstract: In a method for forming a packaging structure, a metal pad is formed on a semiconductor substrate, and a first polymer insulating layer is formed over the semiconductor substrate. An opening passing through the first polymer insulating layer is formed to expose a portion of the metal pad. A copper-containing material is deposited in the opening and over the first polymer insulating layer, thereby forming a copper-containing layer having a first thickness and a first width over the first polymer insulating layer. A conductive bump having a second width is formed over the copper-containing layer, in which the second width is smaller than the first width. An exposed portion of the copper-containing layer is etched using the conductive bump as a mask until the exposed portion is reduced to a second thickness, thereby forming a monolithic copper-containing structure.
    Type: Application
    Filed: July 30, 2013
    Publication date: February 5, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., LTD.
    Inventors: Chao-Wen Shih, Yung-Ping Chiang, Chen-Chih Hsieh, Hao-Yi Tsai