Abstract: A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The first side of the substrate is attached to a carrier. The substrate is thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the substrate. A device die is bonded to the second connectors. The substrate is singulated into multiple packages.

Abstract: A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The first side of the substrate is attached to a carrier. The substrate is thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the substrate. A device die is bonded to the second connectors. The substrate is singulated into multiple packages.

Abstract: A semiconductor package includes a first semiconductor die, a second semiconductor die, a semiconductor bridge, an integrated passive device, a first redistribution layer, and connective terminals. The second semiconductor die is disposed beside the first semiconductor die. The semiconductor bridge electrically connects the first semiconductor die with the second semiconductor die. The integrated passive device is electrically connected to the first semiconductor die. The first redistribution layer is disposed over the semiconductor bridge. The connective terminals are disposed on the first redistribution layer, on an opposite side with respect to the semiconductor bridge. The first redistribution layer is interposed between the integrated passive device and the connective terminals.

Abstract: A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The substrate is singulated to form dies. The first side of the dies are attached to a carrier. The dies are thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the dies. A device die is bonded to the second connectors. The dies and device dies are singulated into multiple packages.

Abstract: A manufacturing method of a circuit board comprises the following steps. Firstly, provide a first core layer, a second core material layer, and a central dielectric material layer. Secondly, press the first core layer, the second core material layer, and the central dielectric material layer to form a composite circuit structure. Thirdly, removing a portion of the central dielectric material layer located at a periphery of a pre-removing area and a portion of the second core material layer located at the periphery of the pre-removing area. Finally, remove a portion of the central dielectric material layer located within the pre-removing area and a portion of the second core material layer located within the pre-removing area to form a central dielectric layer and a second core layer.

Abstract: A method, for fabricating a heat dissipation substrate, includes the steps of: providing a substrate, with the substrate including a metal layer, an insulation layer, and a first conductive layer, with the insulation layer positioned between the metal layer and the first conductive layer, and with the metal layer thicker than the first conductive layer; removing part of the metal layer for forming a metal bulk; providing an adhesive layer including an opening, with the opening corresponding to the metal bulk; providing a second conductive layer; laminating the second conductive layer, the adhesive layer and the substrate; forming a hole in the insulation layer and the first conductive layer, with the hole positioned under the metal bulk; and forming a third conductive layer in the hole.

Abstract: A manufacturing method of a circuit board is provided. Providing a substrate, where a first laser resistant structure is disposed on a first dielectric layer and at the periphery of a pre-removing area, a second dielectric layer covers the first laser resistant structure, a circuit layer is disposed on the second dielectric layer, a second laser resistant structure is disposed on the second dielectric layer and at the periphery of the pre-removing area, a third dielectric layer covers the circuit layer and the second laser resistant structure. There are gaps between the second laser resistant structure and the circuit layer, and the vertical projection of the gaps on the first dielectric layer overlaps the first laser resistant structure. A laser machining process is performed to etch the third dielectric layer at the periphery of the pre-removing area. The portion of the third dielectric layer within the pre-removing area is removed.

Abstract: A manufacturing method of a circuit board comprises the following steps. Firstly, provide a first core layer, a second core material layer, and a central dielectric material layer. Secondly, press the first core layer, the second core material layer, and the central dielectric material layer to form a composite circuit structure. Thirdly, removing a portion of the central dielectric material layer located at a periphery of a pre-removing area and a portion of the second core material layer located at the periphery of the pre-removing area. Finally, remove a portion of the central dielectric material layer located within the pre-removing area and a portion of the second core material layer located within the pre-removing area to form a central dielectric layer and a second core layer.

Abstract: A circuit board having a cavity is provided. The circuit board includes a first core layer, a second core layer, and a central dielectric layer. The first core layer includes a core dielectric layer and a core circuit layer, wherein the core circuit layer is disposed on the core dielectric layer. The second core layer is disposed on the first core layer. The central dielectric layer is disposed between the first core layer and the second core layer. The cavity runs through the second core layer and the central dielectric layer and exposes a portion of the core circuit layer.

Abstract: A circuit board having a removing area is provided. The circuit board includes a first dielectric layer, a first laser resistant structure disposed on the first dielectric layer and located at the periphery of the removing area, a second dielectric layer disposed on the first dielectric layer, a circuit layer disposed on the second dielectric layer, a second laser resistant structure disposed on the second dielectric layer and located at the periphery of the removing area, and a third dielectric layer disposed on the second dielectric layer. The second laser resistant structure is insulated from the circuit layer. There is a gap between the second laser resistant structure and the circuit layer, and the vertical projection of the gap on a first surface overlaps the first laser resistant structure. The third dielectric layer exposes the portion of the circuit layer within the removing area.

Abstract: A method for manufacturing a printed circuit board includes the steps of: providing a base board having a first surface layer; performing a first patterning process to the base board to form a bottom circuit on the first surface layer; forming a metal protection layer on the bottom circuit; performing a second patterning process to the metal protection layer to form a patterned metal protection layer; performing a build-up process to the base board to form a first built-up layer on the bottom circuit and the patterned metal protection layer; performing a third patterning process to the first built-up layer to form a first built-up layer circuit; performing a laser manufacturing process to the first built-up layer to form a cavity structure; and clearing the patterned metal protection layer.

Abstract: A method for fabricating a heat dissipation substrate is disclosed. The method includes the steps of: providing a substrate, wherein the substrate includes a metal layer, an insulation layer, and a first conductive layer, of which the insulation layer is positioned between the metal layer and the first conductive layer, and the metal layer is thicker than the first conductive layer; removing the partial metal layer for forming a metal bulk; providing an adhesive layer, wherein the adhesive layer includes an opening, and the opening is corresponding to the metal bulk; providing a second conductive layer; laminating the second conductive layer, the adhesive layer and the substrate; forming a hole in the insulation layer and the first conductive layer, wherein the hole is positioned under the metal bulk; forming a third conductive layer in the hole.

Abstract: A system has a processor coupled to access a document database that indexes keywords and instances of entities having entity types in a plurality of documents. The processor is programmed to receive an input query including one or more keywords and one or more entity types, and search the database for documents having the keywords and entities with the entity types of the input query. The processor is programmed for aggregating a respective score for each of a plurality of entity tuples across the plurality of documents. The aggregated scores are normalized. Each respective normalized score provides a ranking of a respective entity tuple, relative to other entity tuples, as an answer to the input query. The processor has an interface to a storage or display device or network for outputting a list including a subset of the entity tuples having the highest normalized scores among the plurality of entity tuples.

Abstract: A circuit board having a cavity is provided. The circuit board includes a first core layer, a second core layer, and a central dielectric layer. The first core layer includes a core dielectric layer and a core circuit layer, wherein the core circuit layer is disposed on the core dielectric layer. The second core layer is disposed on the first core layer. The central dielectric layer is disposed between the first core layer and the second core layer. The cavity runs through the second core layer and the central dielectric layer and exposes a portion of the core circuit layer.

Abstract: A method for manufacturing a printed circuit board is disclosed. The method comprises the steps of: providing a base board, wherein the base board comprises a first surface layer; performing a first patterning process to the base board to form a bottom circuit on the first surface layer; forming a metal protection layer on the bottom circuit; performing a second patterning process to the metal protection layer to form a patterned metal protection layer; performing a build-up process to the base board to form a first built-up layer on the bottom circuit and the patterned metal protection layer; performing a third patterning process to the first built-up layer to form a first built-up layer circuit; performing a laser manufacturing process to the first built-up layer to form a cavity structure; and clearing the patterned metal protection layer.

Abstract: A circuit board having a removing area is provided. The circuit board includes a first dielectric layer, a first laser resistant structure disposed on the first dielectric layer and located at the periphery of the removing area, a second dielectric layer disposed on the first dielectric layer, a circuit layer disposed on the second dielectric layer, a second laser resistant structure disposed on the second dielectric layer and located at the periphery of the removing area, and a third dielectric layer disposed on the second dielectric layer. The second laser resistant structure is insulated from the circuit layer. There is a gap between the second laser resistant structure and the circuit layer, and the vertical projection of the gap on a first surface overlaps the first laser resistant structure. The third dielectric layer exposes the portion of the circuit layer within the removing area.

Abstract: A computer program product being embodied on a computer readable medium for extracting semantic information about a plurality of documents being accessible via a computer network, the computer program product including computer-executable instructions for: generating a plurality of tokens from at least one of the documents, each token being indicative of a displayed item and a corresponding position; and, constructing at least one parse tree indicative of a semantic structure of the at least one document from the tokens dependently upon a grammar being indicative of presentation conventions.

Abstract: A system has a processor coupled to access a document database that indexes keywords and instances of entities having entity types in a plurality of documents. The processor is programmed to receive an input query including one or more keywords and one or more entity types, and search the database for documents having the keywords and entities with the entity types of the input query. The processor is programmed for aggregating a respective score for each of a plurality of entity tuples across the plurality of documents. The aggregated scores are normalized. Each respective normalized score provides a ranking of a respective entity tuple, relative to other entity tuples, as an answer to the input query. The processor has an interface to a storage or display device or network for outputting a list including a subset of the entity tuples having the highest normalized scores among the plurality of entity tuples.