Abstract: A placement method for integrated circuit design is provided. Each net is considered as a soft module. The net will receive a larger penalty if it covers more routing congested regions. Therefore, it is easier to move the nets away from routing congested regions. In addition, to relieve local congestion, a novel inflation method is proposed to expand the area of a cluster according to its internal connectivity intensity and routing congestion occupied by the cluster. Accordingly, it can get better routability and wirelength.

Abstract: A placement method for integrated circuit design is provided. Each net is considered as a soft module. The net will receive a larger penalty if it covers more routing congested regions. Therefore, it is easier to move the nets away from routing congested regions. In addition, to relieve local congestion, a novel inflation method is proposed to expand the area of a cluster according to its internal connectivity intensity and routing congestion occupied by the cluster. Accordingly, it can get better routability and wirelength.

Abstract: An inspection method including following steps is provided. A pixel array substrate including a plurality of pixel units is in contact with a photoelectric inspection device. A plurality of electrical signals is inputted to the pixel units of the pixel array substrate and the photoelectric inspection device. Based on an optical property of the photoelectric inspection device, the pixel units of the pixel array substrate are being examined on whether they are normal or not. Moreover, an inspection apparatus realizing the inspection method is also provided.

Abstract: An electronic device includes a shell, a display module and a cushion. The shell includes a bottom plate and a top plate. The top plate defines an opening. The display module is disposed in the shell and faces the opening. The display module is spaced from the bottom plate of the shell. The cushion is disposed between the display module and the bottom plate of the shell, and brought into contact with the display module for cushioning the display module when an external force is applied to the display module.

Abstract: An inspection method including following steps is provided. A pixel array substrate including a plurality of pixel units is in contact with a photoelectric inspection device. A plurality of electrical signals is inputted to the pixel units of the pixel array substrate and the photoelectric inspection device. Based on an optical property of the photoelectric inspection device, the pixel units of the pixel array substrate are being examined on whether they are normal or not. Moreover, an inspection apparatus realizing the inspection method is also provided.

Abstract: A method of manufacturing an integrated circuit package includes providing a ball grid array (BGA) module including BGA balls on a side of the BGA module; providing a base substrate; and placing the BGA module on the base substrate. The BGA balls are placed between the BGA module and the base substrate. An adhesive is applied between and contacting the BGA module and the base substrate. The adhesive is then cured. The BGA balls are re-flowed after the step of curing the adhesive.

Abstract: An electronic device includes a shell, a display module and a cushion. The shell includes a bottom plate and a top plate. The top plate defines an opening The display module is disposed in the shell and faces the opening The display module is spaced from the bottom plate of the shell. The cushion is disposed between the display module and the bottom plate of the shell, and brought into contact with the display module for cushioning the display module when an external force is applied to the display module.

Abstract: The present invention provides a method for packaging semiconductor device which is using more than once reflow processes to heat the solder ball to prevent the deformation of solder ball, so that the yield of the manufacturing process can be increased and the reliability of the semiconductor device can be increased.

Abstract: The present invention provides a method for packaging semiconductor device which is using more than once reflow processes to heat the solder ball to prevent the deformation of solder ball, so that the yield of the manufacturing process can be increased and the reliability of the semiconductor device can be increased.

Abstract: A method of manufacturing an integrated circuit package includes providing a ball grid array (BGA) module including BGA balls on a side of the BGA module; providing a base substrate; and placing the BGA module on the base substrate. The BGA balls are placed between the BGA module and the base substrate. An adhesive is applied between and contacting the BGA module and the base substrate. The adhesive is then cured. The BGA balls are re-flowed after the step of curing the adhesive.

Abstract: An improved structure of a pin platform of an integrated circuit having a pin platform body including a chip seat and a plurality of leading plates having their end portions being concentrated on the chip seat and the chip seat being connected to the pin platform body via the connection plate, characterized in that the surrounding of the chip seat is provided with a framing side, and the framing side is connected to a connection plate, and the surface of the chip seat is smaller than the connection surface of the IC to be installed, and the size of the framing side is larger than the size of the connection face of the IC. Therefore, a high performance greenery package is obtained and the ground wire of the IC can be soldered to the framing side, which provides a smooth connection and a communication.

Abstract: An improved structure of a pin platform of an integrated circuit having a pin platform body including a chip seat and a plurality of leading plates having their end portions being concentrated on the chip seat and the chip seat being connected to the pin platform body via the connection plate, characterized in that the surrounding of the chip seat is provided with a framing side, and the framing side is connected to a connection plate, and the surface of the chip seat is smaller than the connection surface of the IC to be installed, and the size of the framing side is larger than the size of the connection face of the IC. Therefore, a high performance greenery package is obtained and the ground wire of the IC can be soldered to the framing side, which provides a smooth connection and a communication.