Abstract: A liquid crystal display apparatus with a driving circuit to make full use of an inherently high response speed of TL-AFLC. In addition to a source driver and a gate driver of conventional structures, the apparatus comprises a resetting source driver and a resetting gate driver for applying, upon writing of video signals to all pixels on a given scanning line in one horizontal period, a reset voltage for resetting beforehand any voltages remaining in all pixels on a plurality of scanning lines following that given scanning line. Application of the reset voltage takes place prior to the one horizontal period in which to write the video signals to all pixels on the scanning line in question and over a plurality of horizontal periods preceding that one horizontal period.