Patents by Inventor Chen-Han Yang

Chen-Han Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096705
    Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu Kao, Chen-Yui Yang, Hsien-Chung Huang, Chao-Cheng Chen, Shih-Yao Lin, Chih-Chung Chiu, Chih-Han Lin, Chen-Ping Chen, Ke-Chia Tseng, Ming-Ching Chang
  • Publication number: 20240087955
    Abstract: A method and apparatus for forming tungsten features in semiconductor devices is provided. The method includes exposing a top opening of a feature formed in a substrate to a physical vapor deposition (PVD) process to deposit a tungsten liner layer within the feature. The PVD process is performed in a first processing region of a first processing chamber and the tungsten liner layer forms an overhang portion, which partially obstructs the top opening of the feature. The substrate is transferred from the first processing region of the first processing chamber to a second processing region of a second processing chamber without breaking vacuum. The overhang portion is exposed to nitrogen-containing radicals in the second processing region to inhibit subsequent growth of tungsten along the overhang portion. The feature is exposed to a tungsten-containing precursor gas to form a tungsten fill layer over the tungsten liner layer within the feature.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 14, 2024
    Inventors: Yi XU, Xianyuan ZHAO, Zhimin QI, Aixi ZHANG, Geraldine VASQUEZ, Dien-Yeh WU, Wei LEI, Xingyao GAO, Shirish PETHE, Wenting HOU, Chao DU, Tsung-Han YANG, Kyoung-Ho BU, Chen-Han LIN, Jallepally RAVI, Yu LEI, Rongjun WANG, Xianmin TANG
  • Patent number: 10287386
    Abstract: The present invention is related to a core-shell particle and preparation and use thereof. The core of the core-shell particle includes a vinyl polymer. The shell of the core-shell particle includes a hydrophobic silane bonded to a surface of the core via a silane coupling agent. The core-shell particles are applied in a matting material as a matting agent.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: May 14, 2019
    Assignee: Eternal Materials Co., Ltd.
    Inventors: Yu-Huei Su, Yu-Lin Hsiao, Wen-Yen Chiu, Chi-An Dai, Chen-Han Yang, Bo-Ting Chou
  • Publication number: 20190031807
    Abstract: The present invention is related to a core-shell particle and preparation and use thereof. The core of the core-shell particle includes a vinyl polymer. The shell of the core-shell particle includes a hydrophobic silane bonded to a surface of the core via a silane coupling agent. The core-shell particles are applied in a matting material as a matting agent.
    Type: Application
    Filed: July 28, 2017
    Publication date: January 31, 2019
    Inventors: Yu-Huei Su, Yu-Lin Hsiao, Wen-Yen Chiu, Chi-An Dai, Chen_Han Yang, Bo-Ting Chou
  • Patent number: 9104385
    Abstract: The invention provides an expansion card adapted for a motherboard, in which the motherboard includes a first slot, and the first slot is located at a surface of the motherboard. The expansion card includes a circuit board, a heat-dissipating module and a supporter. The circuit board includes a connecting interface configured for being inserted into the first slot of the motherboard. The heat-dissipating module is disposed at a side of the circuit board and has a bottom surface. When the expansion card is inserted into the first slot, the supporter is disposed at the bottom surface of the heat-dissipating module so that the bottom surface of the heat-dissipating module is substantially parallel to the surface of the motherboard.
    Type: Grant
    Filed: May 23, 2012
    Date of Patent: August 11, 2015
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Chen-Han Yang, Chih-Kuan Liu
  • Publication number: 20120300386
    Abstract: The invention provides an expansion card adapted for a motherboard, in which the motherboard includes a first slot, and the first slot is located at a surface of the motherboard. The expansion card includes a circuit board, a heat-dissipating module and a supporter. The circuit board includes a connecting interface configured for being inserted into the first slot of the motherboard. The heat-dissipating module is disposed at a side of the circuit board and has a bottom surface. When the expansion card is inserted into the first slot, the supporter is disposed at the bottom surface of the heat-dissipating module so that the bottom surface of the heat-dissipating module is substantially parallel to the surface of the motherboard.
    Type: Application
    Filed: May 23, 2012
    Publication date: November 29, 2012
    Applicant: ASUSTEK COMPUTER INC.
    Inventors: Chen-Han Yang, Chih-Kuan Liu