Abstract: A memory device, such as a 3D AND flash memory, includes a memory cell block, a word line driver, and a plurality of bit line switches. The word line driver has a plurality of complementary transistor pairs for respectively generating a plurality of word line signals for a plurality of word lines. Substrates of a first transistor and a second transistor of each of the complementary transistor pairs respectively receive a first voltage and a second voltage. Each of the bit line switches includes a third transistor. A substrate of the third transistor receives a third voltage. The first voltage, the second voltage, and the third voltage are constant static voltages during a soft program operation and a soft program verify operation.

Abstract: Provided are a package structure having stacked semiconductor dies with wavy sidewalls and a method of forming the same. The package structure includes: a first die and a second die bonded together; a first encapsulant laterally encapsulating the first die; and a second encapsulant laterally encapsulating the second die, wherein a second interface of the second die in contact with the second encapsulant is a wavy interface in a cross-sectional plane.

Abstract: An embodiment bump on trace (BOT) structure includes a contact element supported by an integrated circuit, an under bump metallurgy (UBM) feature electrically coupled to the contact element, a metal ladder bump mounted on the under bump metallurgy feature, the metal ladder bump having a first tapering profile, and a substrate trace mounted on a substrate, the substrate trace having a second tapering profile and coupled to the metal ladder bump through direct metal-to-metal bonding. An embodiment chip-to-chip structure may be fabricated in a similar fashion.

Abstract: In an embodiment, a device includes: a passivation layer on a semiconductor substrate; a first redistribution line on and extending along the passivation layer; a second redistribution line on and extending along the passivation layer; a first dielectric layer on the first redistribution line, the second redistribution line, and the passivation layer; and an under bump metallization having a bump portion and a first via portion, the bump portion disposed on and extending along the first dielectric layer, the bump portion overlapping the first redistribution line and the second redistribution line, the first via portion extending through the first dielectric layer to be physically and electrically coupled to the first redistribution line.

Abstract: A data storage device includes multiple storage modules. Each storage module includes a storage which having a memory device and a first memory controller and a second memory controller. The first memory controller is coupled to the memory device for accessing the memory device. The second memory controller is coupled to the storage for accessing the storage. The first memory controller includes a first transmission interface. The second memory controller includes a second transmission interface. The first memory controller and the second memory controller communicate with each other through the first transmission interface and the second transmission interface.

Abstract: A bridge device includes a first controller and a second controller. The first controller includes a first transmission interface. The second controller is coupled to the first controller and includes a second transmission interface coupled to the first transmission interface. The first transmission interface and the second transmission interface are both flash memory interface.

Abstract: A method for detecting a defect includes: a measurement image including a wafer edge of a wafer to be detected is acquired; an image region to be detected is determined in the measurement image; feature extraction is performed on the image region to be detected to obtain a pixel distribution characteristic of the image region to be detected; and defect detection is performed on the wafer edge based on the pixel distribution characteristic of the image region to be detected.

Abstract: Described here are methods of assessing response of a patient to an EZH2 inhibitor and methods of treating certain cancers by administering therapeutically effective amounts of an EZH2 inhibitor and a PARP-1 inhibitor.

Abstract: This invention is related to an anchor implantation system capable of being fixed on a bone and including an anchor and an awl. The anchor comprises an inner side, an outer side and a perforation in connection therewith, and the anchor further includes an accommodating portion and a thread portion. The accommodating portion and the thread portion are disposed at the inner side and the outer side of the anchor, respectively. One end of the awl penetrates the accommodating portion and protrudes from the perforation, and the shape of the cross section of the awl is non-circular. The awl is rotatable to drive the anchor, so that the anchor is screwed into the bone with the thread portion. The present disclosure provides a rotating awl with a non-circular shape in cross section to enlarge a pilot hole when drilling the bone, so that the anchor can be screwed into the bone while drilling.