Patents by Inventor Chen-Hsien Liao

Chen-Hsien Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210041755
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Application
    Filed: October 29, 2020
    Publication date: February 11, 2021
    Applicant: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Publication number: 20210041756
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Application
    Filed: October 29, 2020
    Publication date: February 11, 2021
    Applicant: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Patent number: 10901269
    Abstract: A pixel array including a first common line, a first conductive line, a first connection line, a second common line, a second conductive line, a third common line, and a first connection structure is provided. The first common line is located on a first side of a first scan line. The first conductive line includes a first extending portion and a second extending portion. The first connection line crosses the first scan line so as to electrically connect the first extending portion to the second extending portion. The second common line is located on a first side of a second scan line. The second conductive line includes a third extending portion and a fourth extending portion. The first connection structure electrically connect the second common line to the third common line.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: January 26, 2021
    Assignee: Au Optronics Corporation
    Inventors: Jia-Hong Wang, Ya-Ling Hsu, Chen-Hsien Liao
  • Patent number: 10852609
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: December 1, 2020
    Assignee: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Publication number: 20200272010
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Application
    Filed: February 18, 2020
    Publication date: August 27, 2020
    Applicant: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Patent number: 10755661
    Abstract: A display panel has a display area and a non-display area surrounding the display area, and the display panel includes scan lines, data lines, pixel structures, at least one driving device, capacitor electrode lines, and compensation capacitors. Each pixel structure includes an active device, a pixel electrode, and a storage capacitor. The driving device is located in the non-display area and is electrically connected to the pixel structures. The capacitor electrode lines extend to the display area from the non-display area and are electrically connected to the storage capacitors of the pixel structures. The compensation capacitors are located in the non-display area and between the pixel structures and the driving device. Two ends of each of the compensation capacitor are electrically connected to one of the scan lines and one of the capacitor electrode lines, respectively.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: August 25, 2020
    Assignee: Au Optronics Corporation
    Inventors: Yueh-Hung Chung, Ya-Ling Hsu, Han-Ming Chen, Chen-Hsien Liao
  • Publication number: 20200166788
    Abstract: A pixel array including a first common line, a first conductive line, a first connection line, a second common line, a second conductive line, a third common line, and a first connection structure is provided. The first common line is located on a first side of a first scan line. The first conductive line includes a first extending portion and a second extending portion. The first connection line crosses the first scan line so as to electrically connect the first extending portion to the second extending portion. The second common line is located on a first side of a second scan line. The second conductive line includes a third extending portion and a fourth extending portion. The first connection structure electrically connect the second common line to the third common line.
    Type: Application
    Filed: January 30, 2020
    Publication date: May 28, 2020
    Applicant: Au Optronics Corporation
    Inventors: Jia-Hong Wang, Ya-Ling Hsu, Chen-Hsien Liao
  • Patent number: 10598992
    Abstract: A pixel array including a first common line, a first conductive line, a first connection line, a second common line, a second conductive line, a third common line, and a first connection structure is provided. The first common line is located on a first side of a first scan line. The first conductive line includes a first extending portion and a second extending portion. The first connection line crosses the first scan line so as to electrically connect the first extending portion to the second extending portion. The second common line is located on a first side of a second scan line. The second conductive line includes a third extending portion and a fourth extending portion. The first connection structure electrically connect the second common line to the third common line.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: March 24, 2020
    Assignee: Au Optronics Corporation
    Inventors: Jia-Hong Wang, Ya-Ling Hsu, Chen-Hsien Liao
  • Publication number: 20200058679
    Abstract: A pixel structure includes a scan line, a data line, a reference voltage line, a first transistor, a second transistor, a third transistor, a first pixel electrode and a second pixel electrode. The reference voltage line is separated from the data line and intersected with the scan line. A first electrode of the second transistor, a second electrode of the second transistor and a first electrode of the third transistor have straight line portions overlapped with a second semiconductor pattern of the second transistor and a third semiconductor pattern of the third transistor. Both ends of each of the straight line portions are located outside a normal projection region of a first semiconductor pattern of the first transistor, a normal projection region of the second semiconductor pattern of the second transistor and a normal projection region of the third semiconductor pattern of the third transistor.
    Type: Application
    Filed: June 5, 2019
    Publication date: February 20, 2020
    Applicant: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Ya-Ling Hsu, Chen-Hsien Liao
  • Patent number: 10553617
    Abstract: A pixel array including a first scan line, a first data line, a first signal line, a first pixel unit, and a second pixel unit is provided. The first pixel unit includes a first common electrode and a second common electrode. The first common electrode and the second common electrode are respectively located on a first side and a second side of the first scan line. The second common electrode is electrically connected to the first signal line through a first conductive structure. The second pixel unit includes a third common electrode and a fourth common electrode. The third common electrode and the fourth common electrode are respectively located on the first side and the second side of the first scan line. The third common electrode is electrically connected to the first signal line through a second conductive structure.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: February 4, 2020
    Assignee: Au Optronics Corporation
    Inventors: Jia-Hong Wang, Ya-Ling Hsu, Chen-Hsien Liao
  • Publication number: 20190287476
    Abstract: A display panel has a display area and a non-display area surrounding the display area, and the display panel includes scan lines, data lines, pixel structures, at least one driving device, capacitor electrode lines, and compensation capacitors. Each pixel structure includes an active device, a pixel electrode, and a storage capacitor. The driving device is located in the non-display area and is electrically connected to the pixel structures. The capacitor electrode lines extend to the display area from the non-display area and are electrically connected to the storage capacitors of the pixel structures. The compensation capacitors are located in the non-display area and between the pixel structures and the driving device. Two ends of each of the compensation capacitor are electrically connected to one of the scan lines and one of the capacitor electrode lines, respectively.
    Type: Application
    Filed: June 5, 2019
    Publication date: September 19, 2019
    Applicant: Au Optronics Corporation
    Inventors: Yueh-Hung Chung, Ya-Ling Hsu, Han-Ming Chen, Chen-Hsien Liao
  • Patent number: 10393924
    Abstract: A polarizer includes an adhesive, a first protective layer, a substrate layer, a second protective layer and a surface protective film. The surface protective film includes a plurality of first particles. Each of the first particles has a first particle size. The first particle size is greater than or equal to 10 ?m.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: August 27, 2019
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Chien-Chi Chen, Yu-Han Chiang, Shang-Chiang Lin, Chen-Hsien Liao
  • Patent number: 10354606
    Abstract: A display panel has a display area and a non-display area surrounding the display area, and the display panel includes scan lines, data lines, pixel structures, at least one driving device, capacitor electrode lines, and compensation capacitors. Each pixel structure includes an active device, a pixel electrode, and a storage capacitor. The driving device is located in the non-display area and is electrically connected to the pixel structures. The capacitor electrode lines extend to the display area from the non-display area and are electrically connected to the storage capacitors of the pixel structures. The compensation capacitors are located in the non-display area and between the pixel structures and the driving device. Two ends of each of the compensation capacitor are electrically connected to one of the scan lines and one of the capacitor electrode lines, respectively.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: July 16, 2019
    Assignee: Au Optronics Corporation
    Inventors: Yueh-Hung Chung, Ya-Ling Hsu, Han-Ming Chen, Chen-Hsien Liao
  • Patent number: 10332477
    Abstract: A display device includes a display array and a driving circuit. The display array includes at least one scan line. The driving circuit drives the display array and includes a timing controller and a gate driver. The timing controller controls a refresh rate of the display array at a first frequency or a second frequency, where the first frequency is higher substantially than the second frequency. The gate driver switches between supplying an enable voltage signal and a disable voltage signal to the scan line. Under the first or frequency, a corresponding first or second voltage difference exists between the enable voltage signal and the disable voltage signal. The first voltage difference is substantially greater than the second voltage difference, and the enable voltage signal has a same enable period.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: June 25, 2019
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Yueh-Hung Chung, Ya-Ling Hsu, Han-Ming Chen, Chen-Hsien Liao, Gang-Yi Lin, Wen-Chen Lo, Ming-Chang Shih, Hsueh-Ying Huang
  • Patent number: 10281637
    Abstract: A pixel structure includes a first substrate, a plurality of thin film transistors, a wavelength conversion layer, and a metal grating polarizer layer. The thin film transistors are disposed on an inner surface of the first substrate. The metal grating polarizer layer is disposed on the plurality of thin film transistors. The wavelength conversion layer is disposed between the inner surface of first substrate and the metal grating polarizer layer. The wavelength conversion layer is configured to receive a light beam between the wavelength conversion layer and the first substrate and convert the light beam into a light wavelength band corresponding to the wavelength conversion layer.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: May 7, 2019
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Yu-Chao Chen, Hsing-Yi Hsieh, Chen-Hsien Liao
  • Publication number: 20180331123
    Abstract: A pixel array including a first scan line, a first data line, a first signal line, a first pixel unit, and a second pixel unit is provided. The first pixel unit includes a first common electrode and a second common electrode. The first common electrode and the second common electrode are respectively located on a first side and a second side of the first scan line. The second common electrode is electrically connected to the first signal line through a first conductive structure. The second pixel unit includes a third common electrode and a fourth common electrode. The third common electrode and the fourth common electrode are respectively located on the first side and the second side of the first scan line. The third common electrode is electrically connected to the first signal line through a second conductive structure.
    Type: Application
    Filed: March 6, 2018
    Publication date: November 15, 2018
    Applicant: Au Optronics Corporation
    Inventors: Jia-Hong Wang, Ya-Ling Hsu, Chen-Hsien Liao
  • Publication number: 20180329241
    Abstract: A pixel array including a first common line, a first conductive line, a first connection line, a second common line, a second conductive line, a third common line, and a first connection structure is provided. The first common line is located on a first side of a first scan line. The first conductive line includes a first extending portion and a second extending portion. The first connection line crosses the first scan line so as to electrically connect the first extending portion to the second extending portion. The second common line is located on a first side of a second scan line. The second conductive line includes a third extending portion and a fourth extending portion. The first connection structure electrically connect the second common line to the third common line.
    Type: Application
    Filed: November 8, 2017
    Publication date: November 15, 2018
    Applicant: Au Optronics Corporation
    Inventors: Jia-Hong Wang, Ya-Ling Hsu, Chen-Hsien Liao
  • Patent number: 10121424
    Abstract: A display device includes a first substrate, a second substrate, a display medium, a first pixel electrode, a second pixel electrode and a transparent electrode. Sub-pixel units are defined on the first substrate and the second substrate. A sub-pixel unit has a first sub-pixel and a second sub-pixel. The transparent electrode is disposed on the second substrate, and the transparent electrode receives a first common potential and a second common potential. When grey levels displayed by the first sub-pixel and the second sub-pixel are in the range of about 96 to 180, a potential difference between the first common potential received when the first sub-pixel has the maximum brightness and the second common potential received when the second sub-pixel has the minimum brightness is in the range of about 0 mV to 100 mV.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: November 6, 2018
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Yueh-Hung Chung, Hsueh-Ying Huang, Wei-Chun Wei, Shu-Cheng Kung, Ken-Yu Liu, Ya-Ling Hsu, Chen-Hsien Liao
  • Patent number: 10078250
    Abstract: A driving method for pixel is configured to drive a first pixel and a second pixel. The driving method includes that a first output gray value of the first pixel and a second output gray value of the second pixel are set according to saturation. The saturation is decided according to an input gray value. The first pixel and second pixel are driven according to the first output gray value and the second output gray value. When the saturation is within a first value range or a third value range, the difference between the first output gray value and the second output gray value is less than the difference between the first output gray value and the second output gray value, when the saturation is within a second value range. The second value range is between the first value range and the third value range.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: September 18, 2018
    Inventors: Hung-Shiang Ruan, Chien-Wen Chen, Chen-Hsien Liao, Jenn-Jia Su
  • Publication number: 20180203294
    Abstract: A pixel structure includes a first substrate, a plurality of thin film transistors, a wavelength conversion layer, and a metal grating polarizer layer. The thin film transistors are disposed on an inner surface of the first substrate. The metal grating polarizer layer is disposed on the plurality of thin film transistors. The wavelength conversion layer is disposed between the inner surface of first substrate and the metal grating polarizer layer. The wavelength conversion layer is configured to receive a light beam between the wavelength conversion layer and the first substrate and convert the light beam into a light wavelength band corresponding to the wavelength conversion layer.
    Type: Application
    Filed: December 14, 2017
    Publication date: July 19, 2018
    Inventors: Yu-Chao CHEN, Hsing-Yi Hsieh, Chen-Hsien Liao