Patents by Inventor Chen-Hui Hsieh

Chen-Hui Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070291560
    Abstract: A system for improving reliability of a memory device includes one or more memory banks, each of which has one or more regular memory cell rows and one or more redundant memory cell rows. At least one built-in-self-test (BIST) unit is coupled to the memory banks for testing the redundant memory cell rows to determine their respective quality standards, and testing the regular memory cell rows to identify the regular memory cell row that fails to pass a predetermined quality standard. At least one built-in-self-repair (BISR) unit is coupled to the BIST unit for replacing the failed regular memory cell row with the redundant memory cell row having a quality standard equal to or higher than the predetermined quality standard. The BIST unit repeatedly tests the regular memory cell rows a number of times, with each time applying a different quality standard.
    Type: Application
    Filed: June 9, 2006
    Publication date: December 20, 2007
    Inventors: Chen-Hui Hsieh, Kun Lung Chen, Shine Chien Chung, Grigori Grigoriev
  • Patent number: 7212939
    Abstract: A method and system is presented for measuring a data access time of an embedded macro module in an integrated circuit. A single external test signal is inputted into the embedded macro module for enabling a data input therein and extracting a data output therefrom. A pulse width of the single external test signal is incrementally increased until a latch of the data output is observed. Then, the data access time is obtained, as its substantially equals a time interval of the increased pulse width.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: May 1, 2007
    Assignee: Taiwan Semiconductor Manufacturin Co., Ltd.
    Inventors: Chen-Hui Hsieh, Hau-Tai Shieh, Tao-Ping Wang
  • Patent number: 7161845
    Abstract: A memory cell for a static random access memory (SRAM) is disclosed that can be programmed to have a one-bit cell or a multi-bit cell (i.e, including two or more latches) according to a desired amount of cell current. For lower current needs, the memory cell can incorporate a single bit-element, while for higher current needs the memory cell can incorporate two or more bit-elements. An exemplary static random access memory device includes a memory cell having one or more bit-elements, such as bistable latches. Access devices, such as pass transistors, are coupled between each of the bit-elements and a bit line. A word line is coupled to the control terminal of each of the pass transistors for controlling communication between the bit-elements and the bit line.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: January 9, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hui Hsieh, Kun Lung Chen
  • Publication number: 20070002660
    Abstract: A method for making a semiconductor device having a fuse window above a substrate is disclosed. The semiconductor device has at least one fuse protection circuit located under the fuse window. The fuse protection circuit includes a fuse having a first end connected to a first voltage and a second end. A first transistor having a drain is connected to the second end of the fuse, a gate for receiving an input signal, and a source is connected to a second voltage. A second transistor having a drain is connected to the second end of the fuse, a gate, and a source is connected to the second voltage. A first diode having an anode and a cathode, the anode of the first diode is connected to the second voltage and the cathode of the first diode is connected to the second end of the fuse. A second diode having an anode and a cathode, the anode of the second diode is connected to the second end of the fuse and the cathode of the second diode is connected to the first voltage.
    Type: Application
    Filed: August 9, 2006
    Publication date: January 4, 2007
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Chen-Hui Hsieh
  • Patent number: 7111193
    Abstract: This invention provides a circuit and a method for re-configuring fuse sets for memory cell array redundancy repair. In addition this invention relates to the use of fuse sets and spare row and column lines in the memory array to repair memory cell defects. Each fuse set can be used for either a row or a column, as needed, during a repair of the memory array. This allows the fuse sets to be allocated freely according to the process defects distribution on the chip and wafer. This results in higher repair efficiency and increased wafer yield.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: September 19, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co. Ltd.
    Inventors: Chen Hui Hsieh, I-Fay Wang
  • Patent number: 7098491
    Abstract: A semiconductor device having a fuse window above a substrate, the semiconductor device has at least one fuse protection circuit located under the fuse window. The fuse protection circuit includes a fuse having a first end connected to a first voltage and a second end. A first transistor having a drain is connected to the second end of the fuse, a gate for receiving an input signal, and a source is connected to a second voltage. A second transistor having a drain is connected to the second end of the fuse, a gate, and a source is connected to the second voltage. A first diode having an anode and a cathode, the anode of the first diode is connected to the second voltage and the cathode of the first diode is connected to the second end of the fuse.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: August 29, 2006
    Inventor: Chen-Hui Hsieh
  • Publication number: 20060190215
    Abstract: A method and system is presented for measuring a data access time of an embedded macro module in an integrated circuit. A single external test signal is inputted into the embedded macro module for enabling a data input therein and extracting a data output therefrom. A pulse width of the single external test signal is incrementally increased until a latch of the data output is observed. Then, the data access time is obtained, as its substantially equals a time interval of the increased pulse width.
    Type: Application
    Filed: February 18, 2005
    Publication date: August 24, 2006
    Inventors: Chen-Hui Hsieh, Hau-Tai Shieh, Tao-Ping Wang
  • Publication number: 20060140014
    Abstract: A memory cell for a static random access memory (SRAM) is disclosed that can be programmed to have a one-bit cell or a multi-bit cell (i.e., including two or more latches) according to a desired amount of cell current. For lower current needs, the memory cell can incorporate a single bit-element, while for higher current needs the memory cell can incorporate two or more bit-elements. An exemplary static random access memory device includes a memory cell having one or more bit-elements, such as bistable latches. Access devices, such as pass transistors, are coupled between each of the bit-elements and a bit line. A word line is coupled to the control terminal of each of the pass transistors for controlling communication between the bit-elements and the bit line.
    Type: Application
    Filed: December 23, 2004
    Publication date: June 29, 2006
    Applicant: TAIWAN SEMICONDUTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Hui Hsieh, Kun Lung Chen
  • Patent number: 6995601
    Abstract: A fuse state detection circuit (300) has a reference circuit part (302, 302?) and a fuse detection circuit part (308, 308?), the reference circuit part (302, 302?) having a fuse (304, 304?) identical to a fuse (306, 306?) under detection. A reference voltage is between a voltage of a blown fuse (306, 306?) under detection and a voltage of an un-blown fuse (306, 306?) under detection, thus distinguishing a blown state of the fuse (306, 306?) under detection from an un-blown state of the fuse (306, 306?) under detection.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: February 7, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chien-Hua Huang, Chen-Hui Hsieh
  • Publication number: 20050156275
    Abstract: A semiconductor device having a fuse window above a substrate, the semiconductor device has at least one fuse protection circuit located under the fuse window. The fuse protection circuit includes a fuse having a first end connected to a first voltage and a second end. A first transistor having a drain is connected to the second end of the fuse, a gate for receiving an input signal, and a source is connected to a second voltage. A second transistor having a drain is connected to the second end of the fuse, a gate, and a source is connected to the second voltage. A first diode having an anode and a cathode, the anode of the first diode is connected to the second voltage and the cathode of the first diode is connected to the second end of the fuse. A second diode having an anode and a cathode, the anode of the second diode is connected to the second end of the fuse and the cathode of the second diode is connected to the first voltage.
    Type: Application
    Filed: December 30, 2003
    Publication date: July 21, 2005
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Chen-Hui Hsieh
  • Publication number: 20050151578
    Abstract: A fuse state detection circuit (300) has a reference circuit part (302, 302?) and a fuse detection circuit part (308, 308?), the reference circuit part (302, 302?) having a fuse (304, 304?) identical to a fuse (306, 306?) under detection. A reference voltage is between a voltage of a blown fuse (306, 306?) under detection and a voltage of an un-blown fuse (306, 306?) under detection, thus distinguishing a blown state of the fuse (306, 306?) under detection from an un-blown state of the fuse (306, 306?) under detection.
    Type: Application
    Filed: January 14, 2004
    Publication date: July 14, 2005
    Inventors: Chien-Hua Huang, Chen-Hui Hsieh
  • Patent number: 5919516
    Abstract: A process of making environmentally friendly joss-sticks including grinding high-grade carbon materials into powder and mixing the carbon powder with a gum producing powder at a suitable proportion to form a gum-carbon powder mixture; adding a suitable amount of incense to the gum-carbon powder mixture; soaking the bamboo sticks in water and dipping them in the gum producing powder; and soaking the bamboo sticks in water again and dipping them in the gum-carbon powder mixture. The bamboo sticks may further be soaked in water and dipped in a powdered pigment after being wrapped by the gum-carbon powder mixture.
    Type: Grant
    Filed: December 4, 1997
    Date of Patent: July 6, 1999
    Inventor: Chen-Hui Hsieh