Abstract: A structure including a photonic integrated circuit die, an electric integrated circuit die, a semiconductor dam, and an insulating encapsulant is provided. The photonic integrated circuit die includes an optical input/output portion and a groove located in proximity of the optical input/output portion, wherein the groove is adapted for lateral insertion of at least one optical fiber. The electric integrated circuit die is disposed over and electrically connected to the photonic integrated circuit die. The semiconductor dam is disposed over the photonic integrated circuit die. The insulating encapsulant is disposed over the photonic integrated circuit die and laterally encapsulates the electric integrated circuit die and the semiconductor dam.

Abstract: A device includes a first package connected to an interconnect substrate, wherein the interconnect substrate includes conductive routing; and a second package connected to the interconnect substrate, wherein the second package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler and to a photodetector; a via extending through the substrate; an interconnect structure over the photonic layer, wherein the interconnect structure is connected to the photodetector and to the via; and an electronic die bonded to the interconnect structure, wherein the electronic die is connected to the interconnect structure.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a first channel region disposed over a substrate, a second channel region disposed adjacent the first channel region, a gate electrode layer disposed in the first and second channel regions, and a first dielectric feature disposed adjacent the gate electrode layer. The first dielectric feature includes a first dielectric material having a first thickness. The structure further includes a second dielectric feature disposed between the first and second channel regions, and the second dielectric feature includes a second dielectric material having a second thickness substantially less than the first thickness. The second thickness ranges from about 1 nm to about 20 nm.

Abstract: An electronic device including a device housing, a cable, a cable positioning structure, and a housing restriction structure is provided. The device housing includes a through hole. The through hole includes a central region, a first channel region, and a second channel region. The cable passes through the device housing. The cable positioning structure is disposed on the cable. The cable positioning structure includes a first protrusion and a second protrusion. The cable positioning structure is adapted to be rotated between a first orientation and a second orientation relative to the device housing. The housing restriction structure is disposed on the device housing. The housing restriction structure includes a first restrain member and a first stopper. In a positioned state, the cable positioning structure is in the second orientation. The first restrain member and the first stopper restrict the cable positioning structure.

Abstract: A manufacturing control method is applied to a computer system comprising a processor, a storage device, and a display device. The manufacturing control method includes: dividing a plurality of outlier-filtered data into a plurality of data subgroups based on a group division reference value; calculating a plurality of standard deviations for each of these data subgroups; calculating a warning line upper limit and a warning line lower limit based on the group division reference value, a predetermined multiple, and the standard deviations; adjusting either the warning line upper limit or the warning line lower limit based on the predetermined multiple and the standard deviations; and when a sensing data exceeds the warning line upper limit or the warning line lower limit, the computing system triggers a warning signal.

Abstract: In an embodiment, a device includes: a sensor die having a first surface and a second surface opposite the first surface, the sensor die having an input/output region and a first sensing region at the first surface; an encapsulant at least laterally encapsulating the sensor die; a conductive via extending through the encapsulant; and a front-side redistribution structure on the first surface of the sensor die, the front-side redistribution structure being connected to the conductive via and the sensor die, the front-side redistribution structure covering the input/output region of the sensor die, the front-side redistribution structure having a first opening exposing the first sensing region of the sensor die.

Abstract: A fault detection method, includes the following steps. A target sequence is received, the target sequence includes several data. A first moving average operation is performed on the target sequence to establish a first moving average sequence. A second moving average operation is performed on the target sequence to establish a second moving average sequence. A difference operation between the first moving average sequence and the second moving average sequence is performed to obtain a difference sequence, the difference sequence includes several difference values. An upper limit value is set. When one of the difference values is greater than the upper limit value, the target sequence is determines as abnormal.

Abstract: A fault detection method comprises the following steps. Receiving a first original sequence comprising a plurality of first data. Receiving a second original sequence comprising a plurality of second data. Aligning the first original sequence with the second original sequence according to trends of value changing of the first data and the second data. Performing an average operation on the aligned first original sequence and second original sequence to establish a standard sequence. Performing a difference operation between the first original sequence and the standard sequence to obtain a first total difference value. Performing a difference operation between the second original sequence and the standard sequence to obtain a second total difference value. When the first total difference value and/or the second total difference value is greater than an upper limit value, determining that the first original sequence and/or the second total difference value is abnormal.

Abstract: A wafer backside defect detection method and a wafer backside defect detection apparatus are provided. The wafer backside defect detection method includes the following steps. A peripheral edge area of a wafer backside image that at least one notch is located is cropped off. Adjacent white pixels on the wafer backside image are connected to obtain a plurality of abnormal regions. If a total area of top N of the abnormal regions is more than 10% of an area of the wafer, it is deemed that the wafer has a roughness defect. N is a natural number. If the total area of the top N of the abnormal regions is less than 1% of the area of the wafer and a largest abnormal region of the abnormal regions is longer than a predetermined length, it is deemed that the wafer has a scratch defect.

Abstract: An automatic detection method and an automatic detection system for detecting any crack on wafer edges are provided. The automatic detection method includes the following steps. Several wafer images of several wafers are obtained. The wafer images are integrated to create a templet image. Each of the wafer images is compared with the templet image to obtain a differential image. Each of the differential images is binarized. Each of the differential images which are binarized is de-noised. Whether each of the differential images has an edge crack is detected according to pattern of each of the differential images which are de-noised.

Abstract: A wafer backside defect detection method and a wafer backside defect detection apparatus are provided. The wafer backside defect detection method includes the following steps. A peripheral edge area of a wafer backside image that at least one notch is located is cropped off. Adjacent white pixels on the wafer backside image are connected to obtain a plurality of abnormal regions. If a total area of top N of the abnormal regions is more than 10% of an area of the wafer, it is deemed that the wafer has a roughness defect. N is a natural number. If the total area of the top N of the abnormal regions is less than 1% of the area of the wafer and a largest abnormal region of the abnormal regions is longer than a predetermined length, it is deemed that the wafer has a scratch defect.

Abstract: An application level request associated with a portion of an application code requested to be executed with an adjusted hardware acceleration (wherein the portion of the application code is identified using a mechanism compatible with a plurality of different hardware processors) is received. It is determined whether to allow the adjusted hardware acceleration based at least in part on a configuration received via a network.

Abstract: An automatic detection method and an automatic detection system for detecting any crack on wafer edges are provided. The automatic detection method includes the following steps. Several wafer images of several wafers are obtained. The wafer images are integrated to create a templet image. Each of the wafer images is compared with the templet image to obtain a differential image. Each of the differential images is binarized. Each of the differential images which are binarized is de-noised. Whether each of the differential images has an edge crack is detected according to pattern of each of the differential images which are de-noised.

Abstract: An automatic detecting method and an automatic detecting apparatus using the same are provided. The automatic detecting apparatus includes an inputting unit, a dividing unit, a contouring unit, a range analyzing unit, a boundary analyzing unit, an edge detecting unit, an expanding unit and an overlapping unit. The dividing unit is used for dividing an overlooking image into four clusters via a clustering algorithm. The contouring unit is used for obtaining a contour. The range analyzing unit is used for obtaining a detecting range. The boundary analyzing unit is used for obtaining a circular boundary in the detecting range. The edge detecting unit is used for obtaining a plurality of edges in the circular boundary. The expanding unit is used for expanding the edges to obtain a plurality of expanded edges. The overlapping unit is used for overlapping the expanded edges and the contour to obtain a defect pattern.

Abstract: An automatic detecting method and an automatic detecting apparatus using the same are provided. The automatic detecting apparatus includes an inputting unit, a dividing unit, a contouring unit, a range analyzing unit, a boundary analyzing unit, an edge detecting unit, an expanding unit and an overlapping unit. The dividing unit is used for dividing an overlooking image into four clusters via a clustering algorithm. The contouring unit is used for obtaining a contour. The range analyzing unit is used for obtaining a detecting range. The boundary analyzing unit is used for obtaining a circular boundary in the detecting range. The edge detecting unit is used for obtaining a plurality of edges in the circular boundary. The expanding unit is used for expanding the edges to obtain a plurality of expanded edges. The overlapping unit is used for overlapping the expanded edges and the contour to obtain a defect pattern.

Abstract: A method of a fault detection and classification (FDC) may be used to determine outlier tools from a plurality of tools. The method includes generating a plurality of parameter charts, generating a plurality of group charts according to the plurality of parameter charts, generating a score table according to the plurality of group charts, determining outlier tools according to the score table, and performing tool correction on the outlier tools.

Abstract: An improved structure for the compositely formed sound box consists of a plastic-made box with one-way opening and intensified rib and inlet components provided inside the box. The main feature is the bubbled one-piece soundproof layer inside the sound box to expand the overall structure of the sound box, reduce the thickness of the sound box, minimize the thickness of the shell, and upgrade the soundproof performance at the same time.

Abstract: An improved structure for the compositely formed sound box consists of a plastic-made box with one-way opening and intensified rib and inlet components provided inside the box. The main feature is the bubbled one-piece soundproof layer inside the sound box to expand the overall structure of the sound box, reduce the thickness of the sound box, minimize the thickness of the shell, and upgrade the soundproof performance at the same time.

Abstract: A batting tee for baseball is comprised of a base, a height adjustable post erected on the base, a mechanical box containing a swing mechanism and a return mechanism being disposed at the top of the post, a rod being axially erected from one side of the swing mechanical box, a baseball being connected to the top of the rod; a swing for a preset angle being achieved when the baseball is stricken; the baseball returning to its standby position for next swing practice without spinning for 360° to pay better efficiency and results of swing practice by eliminating the return problem of the prior art.

Abstract: A batting tee for baseball and softball; adjustable depending on the size and age of the individual player; safer to use; portable; and allowing intensive training is essentially comprised of an “L”-shaped tee, a telescoping and fordable leg and serving unit; linking unit is disposed between the telescoping leg and the serving unit; or a column made of resilient material to hold the ball being directly inserted onto the serving unit; and a ball feeder connected to the linking unit being externally inserted to the serving unit.