Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion, a fixed portion, a driving assembly, and an assist assembly. The movable portion is used for connecting to an optical element having a main axis. The movable portion is movable relative to the fixed portion. The driving assembly drives the movable portion to move relative to the fixed portion. The assist assembly limits the movement of the movable portion relative to the fixed portion.

Abstract: Semiconductor structures and methods are provided. An exemplary method includes depositing a first conductive material layer over a substrate, patterning the first conductive material layer to form a first conductor plate over the substrate, forming a first high-K dielectric layer over the first conductor plate, forming a second high-K dielectric layer on the first high-K dielectric layer, forming a third high-K dielectric layer on the second high-K dielectric layer, and forming a second conductor plate over the third high-K dielectric layer and vertically overlapped with the first conductor plate, where a composition of the first high-K dielectric layer is the same as a composition of the third high-K dielectric layer and is different from a composition of the second high-K dielectric layer.

Abstract: Examples of an integrated circuit with an interconnect structure and a method for forming the integrated circuit are provided herein. In some examples, the method includes receiving a workpiece that includes an inter-level dielectric layer. A first contact that includes a fill material is formed that extends through the inter-level dielectric layer. The inter-level dielectric layer is recessed such that the fill material extends above a top surface of the inter-level dielectric layer. An etch-stop layer is formed on the inter-level dielectric layer such that the fill material of the first contact extends into the etch-stop layer. A second contact is formed extending through the etch-stop layer to couple to the first contact. In some such examples, the second contact physically contacts a top surface and a side surface of the first contact.

Abstract: Examples of an integrated circuit with an interconnect structure and a method for forming the integrated circuit are provided herein. In some examples, the method includes receiving a workpiece that includes an inter-level dielectric layer. A first contact that includes a fill material is formed that extends through the inter-level dielectric layer. The inter-level dielectric layer is recessed such that the fill material extends above a top surface of the inter-level dielectric layer. An etch-stop layer is formed on the inter-level dielectric layer such that the fill material of the first contact extends into the etch-stop layer. A second contact is formed extending through the etch-stop layer to couple to the first contact. In some such examples, the second contact physically contacts a top surface and a side surface of the first contact.

Abstract: A semiconductor structure and a method of forming the same are provided. In an embodiment, a semiconductor structure includes a first plurality of channel members over a backside dielectric layer, a second plurality of channel members over the backside dielectric layer, a silicide feature disposed in the backside dielectric layer, and a source/drain feature disposed over the silicide feature and extending between the first plurality of channel members and the second plurality of channel members. The silicide feature extends through an entire depth of the backside dielectric layer.

Abstract: A semiconductor structure and a method of forming the same are provided. In an embodiment, a semiconductor structure includes a first plurality of channel members over a backside dielectric layer, a second plurality of channel members over the backside dielectric layer, a silicide feature disposed in the backside dielectric layer, and a source/drain feature disposed over the silicide feature and extending between the first plurality of channel members and the second plurality of channel members. The silicide feature extends through an entire depth of the backside dielectric layer.

Abstract: A semiconductor structure includes an isolation feature disposed over a semiconductor substrate, a semiconductor fin disposed over the semiconductor substrate and adjacent to the isolation feature, a source/drain (S/D) feature disposed over the semiconductor substrate and apart from the isolation feature, an interlayer dielectric (ILD) layer disposed over the isolation feature and the S/D feature, a first contact plug disposed in the ILD layer and over the isolation feature, a second contact plug disposed in the ILD layer and over the S/D feature, and a dielectric layer between surfaces of the first contact plug and the ILD layer and between a sidewall of the second contact plug and the ILD layer, where a bottom surface of the second contact plug is free of the dielectric layer.

Abstract: A semiconductor device includes a source/drain component of a transistor. A source/drain contact is disposed over the source/drain component. A source/drain via is disposed over the source/drain contact. The source/drain via contains copper. A first liner at least partially surrounds the source/drain via. A second liner at least partially surrounds the first liner. The first liner and the second liner are disposed between the source/drain contact and the source/drain via. The first liner and the second liner have different material compositions.

Abstract: A semiconductor structure and a method of forming the same are provided. In an embodiment, a semiconductor structure includes a first plurality of channel members over a backside dielectric layer, a second plurality of channel members over the backside dielectric layer, a silicide feature disposed in the backside dielectric layer, and a source/drain feature disposed over the silicide feature and extending between the first plurality of channel members and the second plurality of channel members. The silicide feature extends through an entire depth of the backside dielectric layer.

Abstract: A semiconductor structure includes an isolation feature disposed over a semiconductor substrate, a semiconductor fin disposed over the semiconductor substrate and adjacent to the isolation feature, a source/drain (S/D) feature disposed over the semiconductor substrate and apart from the isolation feature, an interlayer dielectric (ILD) layer disposed over the isolation feature and the S/D feature, a first contact plug disposed in the ILD layer and over the isolation feature, a second contact plug disposed in the ILD layer and over the S/D feature, and a dielectric layer between surfaces of the first contact plug and the ILD layer and between a sidewall of the second contact plug and the ILD layer, where a bottom surface of the second contact plug is free of the dielectric layer.

Abstract: Examples of an integrated circuit with an interconnect structure and a method for forming the integrated circuit are provided herein. In some examples, the method includes receiving a workpiece that includes an inter-level dielectric layer. A first contact that includes a fill material is formed that extends through the inter-level dielectric layer. The inter-level dielectric layer is recessed such that the fill material extends above a top surface of the inter-level dielectric layer. An etch-stop layer is formed on the inter-level dielectric layer such that the fill material of the first contact extends into the etch-stop layer. A second contact is formed extending through the etch-stop layer to couple to the first contact. In some such examples, the second contact physically contacts a top surface and a side surface of the first contact.

Abstract: A flyback power converter circuit includes: a transformer; a primary side switch, for controlling a primary winding to convert an input voltage to an output voltage and an internal voltage; a primary side control circuit, which is powered by the internal voltage; the primary side control circuit generates a switching signal according to a feedback signal, to operate the primary side switch; a secondary side control circuit, which generates the feedback signal according the output voltage; and a dummy load circuit, which is coupled to the output voltage, wherein when the output voltage drops to or is lower than a predetermined threshold, the dummy load circuit generates a dummy load current, to determine the feedback signal, so that the internal voltage is not undesirably low. When the output voltage exceeds the predetermined threshold, the dummy load circuit adjusts the dummy load current to zero current.

Abstract: A method includes forming a first trench in an isolation region; forming a second trench in a device region, wherein the device region is disposed adjacent to the isolation region and each of the first and second trenches is disposed between two metal gate structures; forming a first dielectric layer in the first and the second trenches; forming a second dielectric layer over and different from the first dielectric layer; removing a portion of the second dielectric layer from the first and the second trenches, leaving behind a remaining portion of the second dielectric layer in the first trench; removing a portion of the first dielectric layer formed over a bottom surface of the second trench; subsequent to removing the portion of the first dielectric layer, removing the remaining portion of second dielectric layer from the first trench; and forming contact features in the first and the second trenches.

Abstract: Examples of an integrated circuit with an interconnect structure and a method for forming the integrated circuit are provided herein. In some examples, the method includes receiving a workpiece that includes an inter-level dielectric layer. A first contact that includes a fill material is formed that extends through the inter-level dielectric layer. The inter-level dielectric layer is recessed such that the fill material extends above a top surface of the inter-level dielectric layer. An etch-stop layer is formed on the inter-level dielectric layer such that the fill material of the first contact extends into the etch-stop layer. A second contact is formed extending through the etch-stop layer to couple to the first contact. In some such examples, the second contact physically contacts a top surface and a side surface of the first contact.

Abstract: An optical image capturing system includes, along the optical axis in order from an object side to an image side, a first lens, a second lens, a third lens, a fourth lens, and a fifth lens. At least one lens among the first to the fifth lenses has positive refractive force. The fifth lens can have negative refractive force, wherein both surfaces thereof are aspheric, and at least one surface thereof has an inflection point. The lenses in the optical image capturing system which have refractive power include the first to the fifth lenses. The optical image capturing system can increase aperture value and improve the imaging quality for use in compact cameras.

Abstract: A flyback power converter circuit includes: a transformer; a primary side switch, for controlling a primary winding to convert an input voltage to an output voltage and an internal voltage; a primary side control circuit, which is powered by the internal voltage; the primary side control circuit generates a switching signal according to a feedback signal, to operate the primary side switch; a secondary side control circuit, which generates the feedback signal according the output voltage; and a dummy load circuit, which is coupled to the output voltage, wherein when the output voltage drops to or is lower than a predetermined threshold, the dummy load circuit generates a dummy load current, to determine the feedback signal, so that the internal voltage is not undesirably low. When the output voltage exceeds the predetermined threshold, the dummy load circuit adjusts the dummy load current to zero current.

Abstract: An optical image capturing system includes, along the optical axis in order from an object side to an image side, a first lens, a second lens, a third lens, a fourth lens, and a fifth lens. At least one lens among the first to the fifth lenses has positive refractive force. The fifth lens can have negative refractive force, wherein both surfaces thereof are aspheric, and at least one surface thereof has an inflection point. The lenses in the optical image capturing system which have refractive power include the first to the fifth lenses. The optical image capturing system can increase aperture value and improve the imaging quality for use in compact cameras.

Abstract: An optical image capturing system with four lenses is provided. In order from an object side to an image side, the optical image capturing system includes a first lens, a second lens, a third lens and a fourth lens. The first lens has positive refractive power and the object side thereof may be a convex surface. The second lens and the third lens have refractive power and the object side and the image side thereof may be all aspheric. The fourth lens has negative power and the image side thereof may be a concave surface. The object side and the image side of the fourth lens are aspheric and at least one surface thereof has one inflection point. When meeting some certain conditions, the optical image capturing system may have outstanding light-gathering ability and an adjustment ability about the optical path in order to elevate the image quality.

Abstract: An optical image capturing system is provided. In the order from an object side to an image side, the optical image capturing system includes a first lens, a second lens, a third lens, and a fourth lens. The first lens has positive refractive power and the object side thereof may be a convex surface. The second lens and the third lens both have refractive power and the object side and the image side of the second lens and the third lens are all aspheric. The fourth lens may have negative refractive power, the image side of the fourth lens may be a concave surface, and the object side and the image side thereof are both aspheric. When meeting some certain conditions, the optical image capturing system may have outstanding light-gathering ability and an adjustment ability about the optical path in order to elevate the image quality.

Abstract: Examples of an integrated circuit with an interconnect structure and a method for forming the integrated circuit are provided herein. In some examples, the method includes receiving a workpiece that includes an inter-level dielectric layer. A first contact that includes a fill material is formed that extends through the inter-level dielectric layer. The inter-level dielectric layer is recessed such that the fill material extends above a top surface of the inter-level dielectric layer. An etch-stop layer is formed on the inter-level dielectric layer such that the fill material of the first contact extends into the etch-stop layer. A second contact is formed extending through the etch-stop layer to couple to the first contact. In some such examples, the second contact physically contacts a top surface and a side surface of the first contact.