Patents by Inventor Chen-Jui Hsu

Chen-Jui Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240364433
    Abstract: A method for measuring a sensitivity of a receiver is provided. The method includes: during a first stage, controlling a signal generator to transmit an input test signal to an input node of the receiver, wherein the receiver generates an output test signal on a first output node of the receiver according to the input test signal; calculating a path loss from the input node of the receiver to the first output node of the receiver according to the input test signal and the output test signal; during a second stage, measuring an output noise power on a second output node of the receiver after a load is connected to the input node of the receiver; and calculating the sensitivity of the receiver according to the path loss and the output noise power. The load may be an antenna or a 50-ohm impedance load.
    Type: Application
    Filed: April 25, 2024
    Publication date: October 31, 2024
    Inventors: Sin-Han Yang, Chen-Jui Hsu
  • Patent number: 11082013
    Abstract: A method of reducing memory effect of a power amplifier (PA), for a look-up table (LUT) based memory digital pre-distortion (DPD) circuit of an electronic device is disclosed. The method comprises generating a pre-distorted signal according to a LUT including parameters of an input signal amplitude and an input signal delay associated with a bandwidth of a signal inputted to the memory DPD circuit, and outputting the pre-distorted signal to the PA for improving the nonlinearity of the PA.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: August 3, 2021
    Assignee: MEDIATEK INC.
    Inventors: Ching-Shyang Maa, Chun-Hsien Peng, Hua-Lung Yang, I-No Liao, Chen-Jui Hsu, Jen-Yang Liu
  • Patent number: 10277450
    Abstract: A method employed by a circuit included within a receiver apparatus and configured for performing IQ mismatch compensation when receiver apparatus is operating under data reception mode includes: transforming a data signal, which is generated by a radio frequency receiver under the data reception mode, from time domain into a plurality of frequency bin signals in frequency domain; calculating to obtain at least one frequency domain calibration parameter according to the plurality of frequency bin signals in frequency domain; and, updating at least one coefficient parameter of IQ mismatch compensation according to the obtained at least one frequency domain calibration parameter, to make IQ mismatch compensation compensate IQ mismatch based on the updated at least one coefficient parameter.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: April 30, 2019
    Assignee: MEDIATEK INC.
    Inventors: Wei-Chiang Li, Chen-Jui Hsu, Chun-Hsien Peng
  • Publication number: 20180331662
    Abstract: A method of reducing memory effect of a power amplifier (PA), for a look-up table (LUT) based memory digital pre-distortion (DPD) circuit of an electronic device is disclosed. The method comprises generating a pre-distorted signal according to a LUT including parameters of an input signal amplitude and an input signal delay associated with a bandwidth of a signal inputted to the memory DPD circuit, and outputting the pre-distorted signal to the PA for improving the nonlinearity of the PA.
    Type: Application
    Filed: May 10, 2018
    Publication date: November 15, 2018
    Inventors: Ching-Shyang Maa, Chun-Hsien Peng, Hua-Lung Yang, I-No Liao, Chen-Jui Hsu, Jen-Yang Liu
  • Publication number: 20180241606
    Abstract: A method employed by a circuit included within a receiver apparatus and configured for performing IQ mismatch compensation when receiver apparatus is operating under data reception mode includes: transforming a data signal, which is generated by a radio frequency receiver under the data reception mode, from time domain into a plurality of frequency bin signals in frequency domain; calculating to obtain at least one frequency domain calibration parameter according to the plurality of frequency bin signals in frequency domain; and, updating at least one coefficient parameter of IQ mismatch compensation according to the obtained at least one frequency domain calibration parameter, to make IQ mismatch compensation compensate IQ mismatch based on the updated at least one coefficient parameter.
    Type: Application
    Filed: September 27, 2017
    Publication date: August 23, 2018
    Inventors: Wei-Chiang Li, Chen-Jui Hsu, Chun-Hsien Peng