Abstract: A method is provided to fabricate a mask ROM device via a medium current implanter. For fabricating the mask ROM device, first, formation of an array of MOS transistors on a semiconductor substrate is achieved. Each of the MOS transistors includes a gate oxide film, a gate electrode, a source region and a drain region. After the formation of the array of transistors, a USG layer, a BPSG layer, metal electrodes and a passivation layer are sequentially formed. After an order from client, an etching back process is performed to remove selected portions of the passivation layer to form openings in accordance with a ROM code. The selected portions are located over the selected gate electrodes respectively. The portions of the BPSG layer within the openings are successively etched until the remained BPSG layer is in a predetermined thickness. Finally, ROM code ions are implanted into the substrate via a medium current implanter through the openings.

Abstract: A method is provided to fabricate a mask ROM device via a medium current implanter. For fabricating the mask ROM device, first, formation of an array of MOS transistors on a semiconductor substrate is achieved. Each of the MOS transistors includes a gate oxide film, a gate electrode, a source region and a drain region. After the formation of the array of transistors, a USG layer, a BPSG layer, metal electrodes and a passivation layer are sequentially formed. After an order from client, an etching back process is performed to remove selected portions of the passivation layer to form openings in accordance with a ROM code. The selected portions are located over the selected gate electrodes respectively. The portions of the BPSG layer within the openings are successively etched until the remained BPSG layer is in a predetermined thickness. Finally, ROM code ions are implanted into the substrate via a medium current implanter through the openings.