Patents by Inventor Chen Kai
Chen Kai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12009363Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiments, a semiconductor device includes an n-type transistor region and a p-type transistor region. The n-type transistor region includes a first gate stack, a first gate spacer over sidewalls of the first gate stack, an n-type epitaxial feature in a source/drain (S/D) region of the n-type transistor region, and a first metal silicide layer over the n-type epitaxial feature. The p-type transistor region includes a second gate stack, a second gate spacer over sidewalls of the second gate stack, a p-type epitaxial feature in an S/D region of the p-type transistor region, a dopant-containing implant layer over the p-type epitaxial feature, and a second metal silicide layer over the dopant-containing implant layer. The dopant-containing implant layer includes a metallic dopant.Type: GrantFiled: June 14, 2021Date of Patent: June 11, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shao-Ming Koh, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
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Patent number: 12003198Abstract: A motor detection method includes the following steps. An excitation current command is provided to a motor device, and the motor device is driven to rotate at the first angle. The first feedback angle of the motor device in the first resting position is detected and obtained. The motor device is driven to rotate at the second angle according to the excitation current command. The second feedback angle of the motor device in the second resting position is detected and obtained. The magnetic pole offset angle of the motor device is calculated according to the first feedback angle and the second feedback angle.Type: GrantFiled: August 18, 2022Date of Patent: June 4, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Shao-Kai Tseng, Yuan-Qi Hsu, Chen-Yeh Lee
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Patent number: 11984089Abstract: The present invention provides improved driving methods for four particle electrophoretic displays that improves the performance of such displays when they are deployed in low temperature environments and the displays are required to be updated when positioned vertically (i.e., the driving electric fields are substantially perpendicular to the direction of Earth's gravity). Methods are provided for displaying each of the colors at each pixel, as desired, with minimal interference (contamination) from the other particles.Type: GrantFiled: April 25, 2023Date of Patent: May 14, 2024Assignee: E Ink CorporationInventors: Ning-Wei Jan, Chen-Kai Chiu, Feng-Shou Lin, Chih-Yu Cheng
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Patent number: 11984090Abstract: The present invention provides four-particle electrophoretic displays with improved driving methods to achieve better color separation between adjacent pixel electrodes. The driving methods improve the color state performance when a first pixel is displaying a mixed state of a first highly-charged particle and a second lower-charged particle of the opposite polarity, while a neighboring pixel is displaying a state of a second highly-charged particle having the opposite polarity to the first highly-charged particle. The particles can be, for example, all reflective or one type of particle can be partially light transmissive.Type: GrantFiled: November 30, 2022Date of Patent: May 14, 2024Assignee: E Ink CorporationInventors: Chih-Yu Cheng, Craig Lin, Ning-Wei Jan, Chen-Kai Chiu, Feng-Shou Lin
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Publication number: 20240145651Abstract: A display device and a display are provided. The display device includes: a drive substrate including a drive circuit, a light-emitting device array, a micro-optical structure, and a color conversion layer array. The light-emitting device array is disposed on a surface of the drive substrate and includes multiple light-emitting devices electrically connected to the drive circuit, and light emitted by the multiple light-emitting devices is light with a same color. The micro-optical structure is disposed above the light-emitting device array and used to refract the light emitted by the light-emitting device array to a uniform refraction angle. The color conversion layer array is disposed above the micro-optical structure, the multiple light-emitting devices respectively correspond to multiple color conversion layers in the color conversion layer array, and the color conversion layer array is used to convert the light emitted by the multiple light-emitting devices into light with a required color.Type: ApplicationFiled: January 11, 2024Publication date: May 2, 2024Inventors: TUNG-KAI LIU, CHEN-KE HSU
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Publication number: 20240128244Abstract: A micro-LED chip includes an epitaxial structure, which includes first and second doped type semiconductor layers and an active layer disposed between the first and second doped type semiconductor layers; a light-emitting side of the first doped type semiconductor layer facing away from the active layer is provided with a patterned structure; and an elongated edge a of the micro-LED chip, a thickness b of the micro-LED chip, and a peak-valley height difference c of the patterned structure satisfy: 0.01?b/a?6, and 0.01?c/b?0.3. By designing a structure size and/or a shape of the micro-LED chip combined with designing the peak-valley height difference of the patterned structure to satisfy the condition of 0.01?c/b?0.3, power of laser lift-off operation can be reduced and a process window thereof is enlarged, and light extraction efficiency of the micro-LED chip is achieved. And a display device using the micro-LED chip is provided.Type: ApplicationFiled: December 21, 2023Publication date: April 18, 2024Inventors: CHEN-KE HSU, XIANGWEI XIE, TUNG-KAI LIU
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Patent number: 11956972Abstract: A semiconductor memory device includes a substrate having a memory area and a logic circuit area thereon, a first interlayer dielectric layer on the substrate, and a second interlayer dielectric layer on the substrate. An embedded memory cell structure is disposed within the memory area between the first interlayer dielectric layer and the second interlayer dielectric layer. The second interlayer dielectric layer includes a first portion covering the embedded memory cell structure within the memory area and a second portion covering the logic circuit area. A top surface of the first portion is coplanar with a top surface of the second portion.Type: GrantFiled: April 13, 2021Date of Patent: April 9, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Hui-Lin Wang, Si-Han Tsai, Ching-Hua Hsu, Chen-Yi Weng, Po-Kai Hsu
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Publication number: 20240096985Abstract: Methods and devices including an air gap adjacent a contact element extending to a source/drain feature of a device are described. Some embodiments of the method include depositing a dummy layer, which is subsequently removed to form the air gap. The dummy layer and subsequent air gap may be formed after a SAC dielectric layer such as silicon nitride is formed over an adjacent metal gate structure.Type: ApplicationFiled: November 27, 2023Publication date: March 21, 2024Inventors: I-Wen WU, Chen-Ming LEE, Fu-Kai YANG, Mei-Yun WANG
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Publication number: 20240099154Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.Type: ApplicationFiled: November 21, 2023Publication date: March 21, 2024Applicant: UNITED MICROELECTRONICS CORPInventors: Hui-Lin Wang, Si-Han Tsai, Dong-Ming Wu, Chen-Yi Weng, Ching-Hua Hsu, Ju-Chun Fan, Yi-Yu Lin, Che-Wei Chang, Po-Kai Hsu, Jing-Yin Jhang
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Publication number: 20240096647Abstract: A method includes forming a first package component, which formation process includes forming a first plurality of openings in a first dielectric layer, depositing a first metallic material into the first plurality of openings, performing a planarization process on the first metallic material and the first dielectric layer to form a plurality of metal pads in the first dielectric layer, and selectively depositing a second metallic material on the plurality of metal pads to form a plurality of bond pads. The first plurality of bond pads comprise the plurality of metal pads and corresponding parts of the second metallic material. The first package component is bonded to a second package component.Type: ApplicationFiled: November 28, 2023Publication date: March 21, 2024Inventors: Mirng-Ji Lii, Chen-Shien Chen, Lung-Kai Mao, Ming-Da Cheng, Wen-Hsiung Lu
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Publication number: 20240097035Abstract: Epitaxial source/drain structures for enhancing performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs, and methods of fabricating the epitaxial source/drain structures, are disclosed herein. An exemplary device includes a dielectric substrate. The device further includes a channel layer, a gate disposed over the channel layer, and an epitaxial source/drain structure disposed adjacent to the channel layer. The channel layer, the gate, and the epitaxial source/drain structure are disposed over the dielectric substrate. The epitaxial source/drain structure includes an inner portion having a first dopant concentration and an outer portion having a second dopant concentration that is less than the first dopant concentration. The inner portion physically contacts the dielectric substrate, and the outer portion is disposed between the inner portion and the channel layer. In some embodiments, the outer portion physically contacts the dielectric substrate.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Inventors: Chen-Ming Lee, I-Wen Wu, Po-Yu Huang, Fu-Kai Yang, Mei-Yun Wang
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Patent number: 11918529Abstract: A fluid-driven actuator 100 includes a bending actuator 200 including a first wall portion 201, a second wall portion 203 cooperating with the first wall portion 201 to define an undulating actuator profile. The bending actuator 200 also includes an inner fluid bladder 202 disposed between the first and second wall portions 201,203 and following the undulating actuator profile. The fluid-driven actuator 100 further includes a restraint member 300 arranged to cooperate with the bending actuator 200 to produce a plurality of motions in response to fluid supplied to the inner fluid bladder 202.Type: GrantFiled: January 17, 2018Date of Patent: March 5, 2024Assignee: National University of SingaporeInventors: Chen Hua Yeow, Hong Kai Yap, Wee Keong Benjamin Ang, Xinquan Liang
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Patent number: 11923794Abstract: A motor control apparatus receives a DC power source through a DC terminal and is coupled to a motor. The motor control apparatus includes a brake, an inverter, and a controller. The brake is coupled to the inverter. The brake includes an energy-consuming component and a switch component. The controller controls the inverter to convert the DC power source to drive the motor. When the controller determines that the DC power source is interrupted, the controller stops controlling the inverter, and the switch component is self-driven turned on so that a back electromotive force generated by the motor is consumed through the energy-consuming component.Type: GrantFiled: June 7, 2023Date of Patent: March 5, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Te-Wei Wang, Yi-Kai Peng, Chen-Yeh Lee
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Publication number: 20240072203Abstract: A method for fabricating light emitting diode (LED) dice includes the steps of: providing a substrate, and forming a plurality of die sized semiconductor structures on the substrate. The method also includes the steps of providing a receiving plate having an elastomeric polymer layer, placing the substrate and the receiving plate in physical contact with an adhesive force applied by the elastomeric polymer layer, and performing a laser lift-off (LLO) process by directing a uniform laser beam through the substrate to the semiconductor layer at an interface with the substrate to lift off the semiconductor structures onto the elastomeric polymer layer. During the laser lift-off (LLO) process the elastomeric polymer layer functions as a shock absorber to reduce momentum transfer, and as an adhesive surface to hold the semiconductor structures in place on the receiving plate.Type: ApplicationFiled: November 6, 2023Publication date: February 29, 2024Applicants: SemiLEDs Corporation, SHIN-ETSU CHEMICAL CO., LTD.Inventors: Chen-Fu Chu, Shih-Kai Chan, Yi-Feng Shih, David Trung Doan, Trung Tri Doan, Yoshinori Ogawa, Kohei Otake, Kazunori Kondo, Keiji Ohori, Taichi Kitagawa, Nobuaki Matsumoto, Toshiyuki Ozai, Shuhei Ueda
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Patent number: 11917923Abstract: A magnetoresistive random access memory (MRAM) structure, including a substrate and multiple MRAM cells on the substrate, wherein the MRAM cells are arranged in a memory region adjacent to a logic region. An ultra low-k (ULK) layer covers the MRAM cells, wherein the surface portion of ultra low-k layer is doped with fluorine, and dents are formed on the surface of ultra low-k layer at the boundaries between the memory region and the logic region.Type: GrantFiled: April 28, 2021Date of Patent: February 27, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Hui-Lin Wang, Ching-Hua Hsu, Si-Han Tsai, Shun-Yu Huang, Chen-Yi Weng, Ju-Chun Fan, Che-Wei Chang, Yi-Yu Lin, Po-Kai Hsu, Jing-Yin Jhang, Ya-Jyuan Hung
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Publication number: 20230260471Abstract: The present invention provides improved driving methods for four particle electrophoretic displays that improves the performance of such displays when they are deployed in low temperature environments and the displays are required to be updated when positioned vertically (i.e., the driving electric fields are substantially perpendicular to the direction of Earth's gravity). Methods are provided for displaying each of the colors at each pixel, as desired, with minimal interference (contamination) from the other particles.Type: ApplicationFiled: April 25, 2023Publication date: August 17, 2023Inventors: NING-WEI JAN, CHEN-KAI CHIU, FENG-SHOU LIN, CHIH-YU CHENG
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Patent number: 11688357Abstract: The present invention provides improved driving methods for four particle electrophoretic displays that improves the performance of such displays when they are deployed in low temperature environments and the displays are required to be updated when positioned vertically (i.e., the driving electric fields are substantially perpendicular to the direction of Earth's gravity). Methods are provided for displaying each of the colors at each pixel, as desired, with minimal interference (contamination) from the other particles.Type: GrantFiled: April 28, 2022Date of Patent: June 27, 2023Assignee: E Ink California, LLCInventors: Ning-Wei Jan, Chen-Kai Chiu, Feng-Shou Lin, Chih-Yu Cheng
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Publication number: 20230104793Abstract: The present invention provides four-particle electrophoretic displays with improved driving methods to achieve better color separation between adjacent pixel electrodes. The driving methods improve the color state performance when a first pixel is displaying a mixed state of a first highly-charged particle and a second lower-charged particle of the opposite polarity, while a neighboring pixel is displaying a state of a second highly-charged particle having the opposite polarity to the first highly-charged particle. The particles can be, for example, all reflective or one type of particle can be partially light transmissive.Type: ApplicationFiled: November 30, 2022Publication date: April 6, 2023Inventors: Chih-Yu CHENG, Craig LIN, Ning-Wei JAN, Chen-Kai CHIU, Feng-Shou LIN
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Publication number: 20230097643Abstract: A high electron mobility transistor comprising a nucleation layer having a first lattice constant, a back-barrier layer having a second lattice constant and a stress management layer having a third lattice constant which is larger than both first and second lattice constants. The stress management layer compensates some or all of the stress due to the lattice mismatch between the nucleation layer and back barrier layer so that the resulting structure experiences less bow and warp.Type: ApplicationFiled: September 22, 2022Publication date: March 30, 2023Applicant: IQE plcInventors: Felix Kaess, Chen-Kai KAO, Oleg LABOUTIN
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Patent number: 11580920Abstract: The present invention provides improved driving methods for four particle electrophoretic displays. The driving methods improve the color state performance when a first pixel is displaying a mixed state of a first highly-charged particle and a second lower-charged particle of the opposite polarity, while a neighboring pixel is displaying a state of a second highly-charged particle having the opposite polarity to the first highly-charged particle. The particles can be, for example, all reflective or one type of particle can be partially light transmissive.Type: GrantFiled: May 24, 2022Date of Patent: February 14, 2023Assignee: E Ink California, LLCInventors: Chih-Yu Cheng, Craig Lin, Ning-Wei Jan, Chen-Kai Chiu, Feng-Shou Lin