Abstract: A latch circuit comprises: a cross latch having a first node and a second node, a first transistor, a second transistor, a third transistor, a first current source, and a second current source. A third terminal of the first transistor and of the second transistor receives a first input signal and a second input signal, respectively. A first terminal of the first transistor and of the second transistor is coupled to the first node and the second node, respectively. A first terminal of the third transistor is coupled to the second terminal of the first transistor and of the second transistor. The first current source is coupled to the first node and affects a transition of a first output signal. The second current source is coupled to the second node and affects a transition of a second output signal.