Patents by Inventor Chen Kong Teh

Chen Kong Teh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9906125
    Abstract: According to an embodiment, provided is a power circuit including: a switching transistor connected between an input terminal and an output terminal; a drive circuit configured to output a drive signal that controls on/off of the switching transistor; an error calculation circuit configured to output an error value between the output voltage and reference voltage; a determination circuit configured to compare a reference value obtained from the error value with a predetermined threshold value and then output a control signal; and a control circuit configured to control a frequency of the drive signal in response to the control signal.
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: February 27, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Chen Kong Teh
  • Publication number: 20170237413
    Abstract: An oscillation circuit includes a delay circuit that includes a first inverter having an input terminal connected to a first node, a delay adjustment circuit including first and second current supply paths through which the first node is charged in response to an output signal of the delay circuit. During charging of the first node, a current with positive temperature characteristics is supplied to the first node through the first current supply path, and a current with negative temperature characteristics is supplied to the first node through the second current supply path.
    Type: Application
    Filed: August 31, 2016
    Publication date: August 17, 2017
    Inventor: Chen Kong TEH
  • Patent number: 9602000
    Abstract: According to one embodiment, a power supply circuit includes a switching element to which a drive signal is supplied, a control value generating circuit that compares an output voltage and a reference voltage to generate a control value, and a comparison circuit that compares a feedback current and the control value. The power supply circuit has a generating circuit that generates a clock signal having a constant period in a PWM control mode and a clock signal according to the output voltage in a PFM control mode. The control value of the control value generating circuit is changed so that averages of the feedback current before and after the control mode switching become equal.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: March 21, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Chen Kong Teh
  • Publication number: 20170063222
    Abstract: According to one embodiment, a switched capacitor power supply circuit includes a switched capacitor power supply circuit unit that supplies a voltage obtained by converting an input voltage with a predetermined conversion ratio as an output voltage by switching a connection configuration between a plurality of capacitors that perform charge and discharge, and a control circuit that switches the connection configuration between the plurality of capacitors according to the output voltage to change the conversion ratio.
    Type: Application
    Filed: March 4, 2016
    Publication date: March 2, 2017
    Inventor: Chen Kong Teh
  • Patent number: 9531269
    Abstract: A semiconductor device includes a first semiconductor chip which includes a first power supply terminal and into which a circuit block which is operated by a power supply voltage supplied to the first power supply terminal is integrated, a power circuit that includes switching transistors and supplies the power supply voltage to the first power supply terminal, and a DCDC control unit that is formed on the first semiconductor chip and generates a control signal for controlling the turning on and off of the switching transistors in response to an information signal from the circuit block and a voltage information signal corresponding to an output voltage from the power circuit.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: December 27, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Chen Kong Teh
  • Patent number: 9502976
    Abstract: According to an embodiment, a power supply circuit is provided. The power supply circuit includes a switching transistor which is controlled to be ON/OFF by a PWM signal, and a mode switching control circuit configured to switch a control mode between peak current mode control and valley current mode control depending on the length of an ON time of the PWM signal which drives the switching transistor.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: November 22, 2016
    Assignee: Kabushi Kaisha Toshiba
    Inventors: Chen Kong Teh, Manabu Yamada
  • Publication number: 20160172974
    Abstract: According to one embodiment, a power supply circuit includes a switching element to which a drive signal is supplied, a control value generating circuit that compares an output voltage and a reference voltage to generate a control value, and a comparison circuit that compares a feedback current and the control value. The power supply circuit has a generating circuit that generates a clock signal having a constant period in a PWM control mode and a clock signal according to the output voltage in a PFM control mode. The control value of the control value generating circuit is changed so that averages of the feedback current before and after the control mode switching become equal.
    Type: Application
    Filed: September 3, 2015
    Publication date: June 16, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Chen Kong TEH
  • Patent number: 9369044
    Abstract: According to one embodiment, a power circuit includes an input terminal 1 to which a DC input voltage is applied, an output terminal 2, a first DC/DC converter which receives the DC input voltage and supplies a first phase output current to the output terminal 2, a second DC/DC converter which supplies an output current lower than the first phase output current to the output terminal in a second phase which is different from the first phase, and a controller which controls operations of the first and second DC/DC converters.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: June 14, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Chen Kong Teh
  • Patent number: 9306592
    Abstract: A feedback loop, which feedbacks information of an output voltage or a load current, is provided. The feedback loop has a first mode, which digitalizes and feedbacks the information of the current voltage or the load current, and a second mode, which feedbacks the information as an analog value.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: April 5, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Chen Kong Teh
  • Publication number: 20160065062
    Abstract: According to an embodiment, a power supply circuit is provided. The power supply circuit includes a switching transistor which is controlled to be ON/OFF by a PWM signal, and a mode switching control circuit configured to switch a control mode between peak current mode control and valley current mode control depending on the length of an ON time of the PWM signal which drives the switching transistor.
    Type: Application
    Filed: February 27, 2015
    Publication date: March 3, 2016
    Inventors: Chen Kong Teh, Manabu Yamada
  • Publication number: 20160056719
    Abstract: According to an embodiment, provided is a power circuit including: a switching transistor connected between an input terminal and an output terminal; a drive circuit configured to output a drive signal that controls on/off of the switching transistor; an error calculation circuit configured to output an error value between the output voltage and reference voltage; a determination circuit configured to compare a reference value obtained from the error value with a predetermined threshold value and then output a control signal; and a control circuit configured to control a frequency of the drive signal in response to the control signal.
    Type: Application
    Filed: February 17, 2015
    Publication date: February 25, 2016
    Inventor: Chen Kong Teh
  • Patent number: 9209822
    Abstract: According to one embodiment, an A/D converter includes a first delay cell column in which a plurality of delay cells, to which a first bias current corresponding to a difference voltage between an input voltage and a reference voltage is supplied, is connected in series. The converter includes a second delay cell column in which a plurality of delay cells, to which a second bias current corresponding to a negative-phase difference voltage of the difference voltage is supplied, is connected in series. The converter includes an encoder unit configured to encode a difference value, in delay time of signal propagation, between the first delay cell column and the second delay cell column.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: December 8, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chen Kong Teh, Atsushi Suzuki
  • Patent number: 9190910
    Abstract: According to one embodiment, the power circuit includes a first feedback loop which feedbacks information on an output voltage and a second feedback loop which feedbacks information on a load current. When the load current is smaller than a predetermined threshold value, the second feedback loop is blocked and a PWM signal is generated using data of a feedback current signal which is stored before blocking the second feedback loop.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: November 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Chen Kong Teh
  • Publication number: 20150280568
    Abstract: A semiconductor device includes a first semiconductor chip which includes a first power supply terminal and into which a circuit block which is operated by a power supply voltage supplied to the first power supply terminal is integrated, a power circuit that includes switching transistors and supplies the power supply voltage to the first power supply terminal, and a DCDC control unit that is formed on the first semiconductor chip and generates a control signal for controlling the turning on and off of the switching transistors in response to an information signal from the circuit block and a voltage information signal corresponding to an output voltage from the power circuit.
    Type: Application
    Filed: May 19, 2015
    Publication date: October 1, 2015
    Inventor: Chen Kong Teh
  • Patent number: 9106225
    Abstract: A semiconductor integrated circuit comprises a state holding circuit that inputs an output of one inverter to another inverter with each other; an input circuit that causes a state of the state holding circuit to transition based on a data signal; a first first-conductive transistor that is inserted between an input of the one inverter and an output of the another inverter and is controlled by the data signal; and a first second-conductive transistor that is connected in parallel with the first first-conductive transistor and is controlled by the data signal.
    Type: Grant
    Filed: July 23, 2013
    Date of Patent: August 11, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chen kong Teh, Hiroyuki Hara
  • Patent number: 9071143
    Abstract: A semiconductor device includes a first semiconductor chip which includes a first power supply terminal and into which a circuit block which is operated by a power supply voltage supplied to the first power supply terminal is integrated, a power circuit that includes switching transistors and supplies the power supply voltage to the first power supply terminal, and a DCDC control unit that is formed on the first semiconductor chip and generates a control signal for controlling the turning on and off of the switching transistors in response to an information signal from the circuit block and a voltage information signal corresponding to an output voltage from the power circuit.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: June 30, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Chen Kong Teh
  • Publication number: 20150115925
    Abstract: According to one embodiment, an A/D converter includes a first delay cell column in which a plurality of delay cells, to which a first bias current corresponding to a difference voltage between an input voltage and a reference voltage is supplied, is connected in series. The converter includes a second delay cell column in which a plurality of delay cells, to which a second bias current corresponding to a negative-phase difference voltage of the difference voltage is supplied, is connected in series. The converter includes an encoder unit configured to encode a difference value, in delay time of signal propagation, between the first delay cell column and the second delay cell column.
    Type: Application
    Filed: August 22, 2014
    Publication date: April 30, 2015
    Inventors: Chen Kong Teh, Atsushi Suzuki
  • Publication number: 20150015229
    Abstract: A feedback loop, which feedbacks information of an output voltage or a load current, is provided. The feedback loop has a first mode, which digitalizes and feedbacks the information of the current voltage or the load current, and a second mode, which feedbacks the information as an analog value.
    Type: Application
    Filed: January 21, 2014
    Publication date: January 15, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Chen Kong Teh
  • Patent number: 8854024
    Abstract: According to one embodiment, a power supply circuit includes a switching control unit that compares a DA converted value of the high order bit of a digital compensation value calculated from an output voltage of a smoothing circuit with a detection value of a current flowing into the smoothing circuit and controls the switching of a switching element on the basis of a signal obtained by shifting the timing of the comparison result on the basis of the low order bit of the digital compensation value.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: October 7, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Chen Kong Teh
  • Publication number: 20140285172
    Abstract: According to one embodiment, the power circuit includes a first feedback loop which feedbacks information on an output voltage and a second feedback loop which feedbacks information on a load current. When the load current is smaller than a predetermined threshold value, the second feedback loop is blocked and a PWM signal is generated using data of a feedback current signal which is stored before blocking the second feedback loop.
    Type: Application
    Filed: August 30, 2013
    Publication date: September 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Chen Kong Teh