Patents by Inventor Chen Kuo
Chen Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240413220Abstract: Semiconductor structures and methods of forming the same are provided. An exemplary method includes depositing a contact etch stop layer (CESL) and an interlayer dielectric (ILD) layer over a bottom epitaxial source/drain feature formed in a bottom portion of a source/drain trench, etching back the CESL and the ILD layer to expose a top portion of the source/drain trench, performing a plasma-enhanced atomic layer deposition process (PEALD) to form an insulating layer over the source/drain trench, where the insulating layer comprises a non-uniform deposition thickness and comprises a first portion in direct contact with the ILD layer and a second portion extending along a sidewall surface of the top portion of the source/drain trench. Method also includes removing the second portion of the insulating layer and forming a top bottom epitaxial source/drain feature on the second portion of the insulating layer and in the source/drain trench.Type: ApplicationFiled: September 27, 2023Publication date: December 12, 2024Inventors: Wan Chen Hsieh, Zhen-Cheng Wu, Tai-Jung Kuo
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Publication number: 20240400746Abstract: A polyurethane and a preparation method thereof are provided. The polyurethane is represented by Formula 1. The preparation method of the polyurethane includes performing an addition reaction between a polyester-polyether polyol represented by the Formula 4 and a di-isocyanate. The formed polyurethane has high elasticity and high moisture-permeable properties.Type: ApplicationFiled: December 21, 2023Publication date: December 5, 2024Applicant: Industrial Technology Research InstituteInventors: Ying-Chen Liao, De-Lun Kuo, Hsu-Tzu Fan, Wei-Cheng Tang, Cheng-Jyun Huang, Shin-Liang Kuo
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Patent number: 12160130Abstract: A power supply system for preventing battery packs connected in parallel from charging each other is provided. Each of a plurality of battery packs includes a plurality of batteries, a sensing resistor, a detector circuit, a discharging transistor, a charging transistor, and a controller circuit. The sensing resistor has a first end connected to a negative terminal of the battery packs and a second end connected to a negative electrode of the battery circuit. The detector circuit is connected to the first end and the second end of the sensing resistor. The discharging transistor has a first end connected to a positive terminal of the battery packs and a second end connected to a first end of the charging transistor. According to a current of the sensing resistor, the controller circuit controls the discharging transistor and the charging transistor to be turned on or off.Type: GrantFiled: December 3, 2021Date of Patent: December 3, 2024Assignee: C-TECH UNITED CORPORATIONInventors: Heng-Chen Kuo, Sheng-Hung Chu
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Patent number: 12160672Abstract: A head-mounted display device includes a main body, a first sensor and a second sensor. The first sensor is disposed on a first setting area of the main body. The second sensor is disposed on a second setting area of the main body. The first setting area and the second setting area respectively have a first central point and a second central point, where the first central point and the second central point are disposed on a horizontal axis. There is a first angle between a connection line of the first central point and the first sensor with the horizontal axis, and there is a second angle between a connection line of the second central point and the second sensor with the horizontal axis, where the first angle is different from the second angle.Type: GrantFiled: December 14, 2022Date of Patent: December 3, 2024Assignee: HTC CorporationInventors: Yan-Min Kuo, Jun-Lin Guo, Wei-Chen Chen
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Patent number: 12154344Abstract: A method for evaluating environment and surroundings of a pedestrian passageway, used in an electronic device, obtains a position information of a target area, and obtains a streetscape image corresponding to the position information of the area. The method further inputs the streetscape image into a trained convolutional neural network, makes the trained convolutional neural network carry out a convolution calculation of the streetscape image to generate a feature vector for classifying a number of target objects in the streetscape image, and outputs the feature vector. The feature vector is input into a full convolution neural network to apply a certain color to a number of pixels belonging to a same target object, and outputs the streetscape image with colored target objects.Type: GrantFiled: December 27, 2021Date of Patent: November 26, 2024Assignee: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Yueh Chang, Chin-Pin Kuo, Tzu-Chen Lin
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Patent number: 12153346Abstract: An organometallic precursor for extreme ultraviolet (EUV) lithography is provided. An organometallic precursor includes a chemical formula of MaXbLc, where M is a metal, X is a multidentate aromatic ligand that includes a pyrrole-like nitrogen and a pyridine-like nitrogen, L is an extreme ultraviolet (EUV) cleavable ligand, a is between 1 and 2, b is equal to or greater than 1, and c is equal to or greater than 1.Type: GrantFiled: February 17, 2021Date of Patent: November 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Cheng Liu, Yi-Chen Kuo, Yen-Yu Chen, Jr-Hung Li, Chi-Ming Yang, Tze-Liang Lee
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Patent number: 12155851Abstract: An electronic apparatus performs a method of decoding video data. The method includes receiving, from the video signal, a picture frame that includes a first component and a second component, receiving, from the video signal, a plurality of sample offsets associated with the second component, reconstructing the samples of the first component before a first in-loop filter module, reconstructing the samples of the second component after a second in-loop filter module, determining a classifier for the second component from one or more reconstructed samples of the first component relative to each sample of the second component, selecting a sample offset from the plurality of sample offsets for the second component according to the classifier, and modifying the reconstructed samples of the second component based on the selected sample offset.Type: GrantFiled: February 23, 2023Date of Patent: November 26, 2024Assignee: BEIJING DAJIA INTERNET INFORMATION TECHNOLOGY CO., LTD.Inventors: Che-Wei Kuo, Xiaoyu Xiu, Wei Chen, Xianglin Wang, Yi-Wen Chen, Tsung-Chuan Ma, Hong-Jheng Jhu, Bing Yu
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Publication number: 20240385367Abstract: A method includes forming a first photonic die, which includes forming a first silicon waveguide, and forming a first nitride waveguide. The method further includes forming a first through-via extending into a first plurality of dielectric layers in the first photonic die, and bonding a second photonic die to the first photonic die. The second photonic die includes a second nitride waveguide. The first silicon waveguide is optically coupled to the second nitride waveguide through the first nitride waveguide. A second through-via extends into a second plurality of dielectric layers in the second photonic die.Type: ApplicationFiled: July 26, 2024Publication date: November 21, 2024Inventors: Chen-Hua Yu, Hsing-Kuo Hsia
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Publication number: 20240385377Abstract: A method includes forming a first photonic package, wherein forming the first photonic package includes patterning a silicon layer to form a first waveguide, wherein the silicon layer is on an oxide layer, and wherein the oxide layer is on a substrate; forming vias extending into the substrate; forming a first redistribution structure over the first waveguide and the vias, wherein the first redistribution structure is electrically connected to the vias; connecting a first semiconductor device to the first redistribution structure; removing a first portion of the substrate to form a first recess, wherein the first recess exposes the oxide layer; and filling the first recess with a first dielectric material to form a first dielectric region.Type: ApplicationFiled: July 29, 2024Publication date: November 21, 2024Inventors: Hsing-Kuo Hsia, Chen-Hua Yu, Kuo-Chiang Ting, Shang-Yun Hou
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Publication number: 20240385516Abstract: An organometallic precursor for extreme ultraviolet (EUV) lithography is provided. An organometallic precursor includes an aromatic di-dentate ligand, a transition metal coordinated to the aromatic di-dentate ligand, and an extreme ultraviolet (EUV) cleavable ligand coordinated to the transition metal. The aromatic di-dentate ligand includes a plurality of pyrazine molecules.Type: ApplicationFiled: June 28, 2024Publication date: November 21, 2024Inventors: Chih-Cheng Liu, Yi-Chen Kuo, Yen-Yu Chen, Jr-Hung Li, Chi-Ming Yang, Tze-Liang Lee
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Publication number: 20240385378Abstract: A package includes a laser diode includes a bonding layer; a first dielectric layer over the laser diode, wherein the first dielectric layer is directly bonded to the bonding layer of the laser diode; a first silicon nitride waveguide in the first dielectric layer, wherein the first silicon nitride waveguide extends over the laser diode; a second dielectric layer over the first silicon nitride waveguide; a silicon waveguide in the second dielectric layer; an interconnect structure over the silicon waveguide; and conductive features extending through the first dielectric layer and the second dielectric layer to electrically contact the interconnect structure.Type: ApplicationFiled: July 31, 2024Publication date: November 21, 2024Inventors: Tsung-Fu Tsai, Hsing-Kuo Hsia, Szu-Wei Lu, Chen-Hua Yu
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Publication number: 20240388388Abstract: The present application relates to devices and components, including apparatus, systems, and methods for selecting timer values and starting or stopping timers related to configured grant or discontinuous reception.Type: ApplicationFiled: April 19, 2024Publication date: November 21, 2024Applicant: Apple Inc.Inventors: Ping-Heng Kuo, Fangli Xu, Zhibin Wu, Ralf Rossbach, Naveen Kumar R. Palle Venkata, Sethuraman Gurumoorthy, Peng Cheng, Yuqin Chen, Haijing Hu, Alexander Sirotkin
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Publication number: 20240385398Abstract: A structure including a photonic integrated circuit die, an electric integrated circuit die, a semiconductor dam, and an insulating encapsulant is provided. The photonic integrated circuit die includes an optical input/output portion and a groove located in proximity of the optical input/output portion, wherein the groove is adapted for lateral insertion of at least one optical fiber. The electric integrated circuit die is disposed over and electrically connected to the photonic integrated circuit die. The semiconductor dam is disposed over the photonic integrated circuit die. The insulating encapsulant is disposed over the photonic integrated circuit die and laterally encapsulates the electric integrated circuit die and the semiconductor dam.Type: ApplicationFiled: July 29, 2024Publication date: November 21, 2024Inventors: Chen-Hua Yu, Hsing-Kuo Hsia, Sung-Hui Huang, Kuan-Yu Huang, Kuo-Chiang Ting, Chi-Hsi Wu, Shang-Yun Hou
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Publication number: 20240385523Abstract: Method of manufacturing semiconductor device includes forming photoresist layer over substrate. Forming photoresist layer includes combining first precursor and second precursor in vapor state to form photoresist material, wherein first precursor is organometallic having formula: MaRbXc, where M at least one of Sn, Bi, Sb, In, Te, Ti, Zr, Hf, V, Co, Mo, W, Al, Ga, Si, Ge, P, As, Y, La, Ce, Lu; R is substituted or unsubstituted alkyl, alkenyl, carboxylate group; X is halide or sulfonate group; and 1?a?2, b?1, c?1, and b+c?5. Second precursor is at least one of an amine, a borane, a phosphine. Forming photoresist layer includes depositing photoresist material over the substrate. The photoresist layer is selectively exposed to actinic radiation to form latent pattern, and the latent pattern is developed by applying developer to selectively exposed photoresist layer to form pattern.Type: ApplicationFiled: July 31, 2024Publication date: November 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Cheng LIU, Yi-Chen KUO, Jia-Lin WEI, Ming-Hui WENG, Yen-Yu CHEN, Jr-Hung LI, Yahru CHENG, Chi-Ming YANG, Tze-Liang LEE, Ching-Yu CHANG
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Publication number: 20240387310Abstract: A package and a method forming the same are provided. The package includes an integrated circuit die. A sidewall of the integrated circuit die has a first facet and a second facet. The first facet and the second facet have different slopes. The package includes an encapsulant surrounding the integrated circuit die and in physical contact with the first facet and the second facet and an insulating layer over the integrated circuit die and the encapsulant. An upper surface of the integrated circuit die is lower than an upper surface of the encapsulant. A sidewall of the insulating layer is substantially coplanar with the first facet.Type: ApplicationFiled: July 30, 2024Publication date: November 21, 2024Inventors: Ting-Chen Tseng, Sih-Hao Liao, Yu-Hsiang Hu, Hung-Jui Kuo
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Publication number: 20240387489Abstract: A package structure is provided, and includes an interposer, a control unit, a plurality of computing units, a signal transmission layer, and an electric-optical material. The control unit is bonded to the interposer. The computing units are disposed around and connected to the control unit. The signal transmission layer is formed in the control unit and the computing units. The electric-optical material is formed in the control unit and the computing units, and the electric-optical material overlaps the signal transmission layer.Type: ApplicationFiled: May 16, 2023Publication date: November 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Chia LIN, Chih-Hsin LU, Chung-Hao TSAI, Hsing-Kuo HSIA, Chuei-Tang WANG, Chen-Hua YU
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Publication number: 20240388277Abstract: An electronic circuit is provided. The electronic circuit includes an electronic element, a driving transistor, a first emitting transistor, and at least one capacitor. A first terminal of the driving transistor is coupled to a power voltage. The power voltage is used to drive the electronic element via the driving transistor. A first terminal of the first emitting transistor is coupled to a second terminal of the driving transistor. A second terminal of the first emitting transistor is coupled to the electronic element. A first terminal of the at least one capacitor is coupled to a gate terminal of the driving transistor. When the electronic element is driven, a second terminal of the at least one capacitor receives the power voltage.Type: ApplicationFiled: April 10, 2024Publication date: November 21, 2024Applicant: Innolux CorporationInventors: Ming-Chun Tseng, Kung-Chen Kuo, Lien-Hsiang Chen, Yong-Zhi Liu, Po-Syun Chen
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Publication number: 20240388649Abstract: An interactive control device includes a housing, a touch display panel and a face cover. The touch display panel is disposed within the housing. The face cover has a front surface and a rear surface. A first hollow configuration is formed on the front surface of the face cover, the face cover is detachably assembly with the housing and placed over the touch display panel, and a display area and a touch area of the touch display panel are limited by the first hollow configuration.Type: ApplicationFiled: December 12, 2023Publication date: November 21, 2024Inventors: Yung-Tai Pan, Wen-Hsien Chan, Rong-Fu Lee, I-Min Shu, Wei-Ching Kuo, Bo-An Chen
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Patent number: 12148132Abstract: An image calibration method applied to a wide-angle image and executed by an image calibration apparatus includes applying primary lens distortion correction for the wide-angle image to generate a corrected image, segmenting an foreground image from the corrected image to generate a background image, applying secondary distortion correction for the foreground image based on the pre-defined object to generate a calibrated foreground image, fusing the background image with the calibrated foreground image to generate a fused image, detecting at least one residual empty pixel not overlapped by the calibrated foreground image within the fused image, and utilizing a machine learning algorithm to fill the at least one residual empty pixel of the fused image by extending the background image to provide an output image. The foreground image contains feature pixels relate to a pre-defined object and the background image has empty pixels corresponding to the foreground image.Type: GrantFiled: January 27, 2022Date of Patent: November 19, 2024Assignee: ALTEK SEMICONDUCTOR CORPORATIONInventors: Yu-Chen Kuo, Yu-Ting Lin, Kuo-Chang Chen
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Patent number: 12149687Abstract: An electronic apparatus performs a method of decoding a video signal. The method comprises: receiving the video signal that includes a first component and a second component in a first picture frame; receiving, from the video signal, a plurality of sample offsets associated with the second component in the first picture frame; deriving a first class index for the second component from a first set of one or more samples of the first component relative to each sample of the second component; selecting a first sample offset from the plurality of sample offsets for the second component according to the first class index; and obtaining a cross-component offsetted sample value of the second component based on the first sample offset in the first picture frame. In some embodiments, the first picture frame is divided into a plurality of regions, and a different classifier is used for each of the plurality of regions.Type: GrantFiled: January 21, 2022Date of Patent: November 19, 2024Assignee: BEIJING DAJIA INTERNET INFORMATION TECHNOLOGY CO., LTD.Inventors: Che-Wei Kuo, Xiaoyu Xiu, Wei Chen, Xianglin Wang, Yi-Wen Chen, Tsung-Chuan Ma, Hong-Jheng Jhu, Bing Yu