Patents by Inventor Chen Luo
Chen Luo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8222095Abstract: A method for fabricating a thin film transistor is provided. A gate is formed on a substrate. A gate insulating layer is formed on the substrate to cover the gate. A metal oxide material layer is formed on the gate insulating layer. A photoresist layer is formed on the metal oxide material layer, in which a thickness of the photoresist layer above the gate is larger than that of the photoresist layer above two sides adjacent to the gate. A portion of the metal oxide material layer is removed to form a metal oxide active layer by using the photoresist layer as a mask. The photoresist layer above the two sides adjacent to the gate is removed and the remaining photoresist layer covers a portion of the metal oxide active layer. A source and a drain are formed on the metal oxide active layer covered by the photoresist layer.Type: GrantFiled: October 27, 2008Date of Patent: July 17, 2012Assignees: Taiwan TFT LCD Association, Chunghwa Picture Tubes, Ltd., Au Optronics Corporation, Hannstar Display Corporation, Chi Mei Optoelectronics Corporation, Industrial Technology Research InstituteInventors: Fang-Chen Luo, Shuo-Wei Liang, Shin-Chuan Chiang, Chao-Nan Chen, Chin-Chih Yu
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Publication number: 20120180054Abstract: A method of delegating work of a computer program across a mixed computing environment is provided. The method includes: performing on one or more processors: allocating a container structure on a first context; delegating a new operation to a second context based on the container; receiving the results of the new operation; and storing the results in the container.Type: ApplicationFiled: January 6, 2011Publication date: July 12, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Harry J. Beatty, III, Peter C. Elmendorf, Charles Gates, Chen Luo
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Patent number: 8184219Abstract: A stacked storage capacitor structure for use in each pixel of a TFT-LCD, wherein a first storage capacitor is formed by a first metal layer, a gate insulator layer and a second metal layer. The second capacitor is formed by the second metal layer, a passivation insulator layer and an ITO layer. The first metal layer and the ITO layer are joined together through a via hole which is etched in one insulator etching step during the overall fabrication process through both the gate insulator and the passivation insulator layers. As such, the two capacitors are connected in parallel in a stacked configuration. With the stacked storage capacitor structure, the charge storage capacity is increased without significantly affecting the aperture ratio of a pixel. The ITO and the pixel electrode can be different parts of an indium tine oxide layer deposited on the passivation insulator layer.Type: GrantFiled: April 24, 2008Date of Patent: May 22, 2012Assignee: AU Optronics CorporationInventors: Fang-Chen Luo, Chang-Cheng Lo
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Patent number: 8089588Abstract: A thin-film transistor array substrate, used in a transflective liquid crystal display. The thin-film transistor array substrate has a substrate, a plurality of pixels, a plurality of scan lines and a plurality of data lines. Each of the pixels has a transparent sub-pixel and a reflective sub-pixel, while the transparent sub-pixel further has a transparent electrode and a first thin-film transistor, and the reflective sub-pixel has a reflective pixel electrode and a second thin-film transistor. The pixel electrode of each sub-pixel is thus electrically connected to a different thin-film transistor. The step of forming a molybdenum layer is thus not required, saving fabrication cost.Type: GrantFiled: October 28, 2005Date of Patent: January 3, 2012Assignee: Au Optronics CorporationInventor: Fang-Chen Luo
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Patent number: 7823158Abstract: A computing environment and techniques are provided for processing work out of order in one or more processing contexts. The processing techniques include: determining, for a processing context having an associated stack of waiting resources, whether a last-in listed resource in the stack of waiting resource is available, and if so, resuming processing of a suspended unit of work requiring the last-in listed resource; and determining, otherwise, whether an out of order execution unit of work is available for processing in the context, and if so, processing the out of order execution unit of work while the suspended unit of work awaits the last-in listed resource. Out of order execution units of work can be processed in order from a regular unit of work queue, or out of order from an out of order unit of work queue of a processing context.Type: GrantFiled: August 18, 2005Date of Patent: October 26, 2010Assignee: International Business Machines CorporationInventors: Harry John Beatty, III, Peter Claude Elmendorf, Chen Luo
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Patent number: 7675582Abstract: A stacked storage capacitor structure for use in each pixel of a TFT-LCD, wherein a first storage capacitor is formed by a first metal layer, a gate insulator layer and a second metal layer. The second capacitor is formed by the second metal layer, a passivation insulator layer and an ITO layer. The first metal layer and the ITO layer are joined together through a via hole which is etched in one insulator etching step during the overall fabrication process through both the gate insulator and the passivation insulator layers. As such, the two capacitors are connected in parallel in a stacked configuration. With the stacked storage capacitor structure, the charge storage capacity is increased without significantly affecting the aperture ratio of a pixel. The ITO and the pixel electrode can be different parts of an indium tine oxide layer deposited on the passivation insulator layer.Type: GrantFiled: December 3, 2004Date of Patent: March 9, 2010Assignee: AU Optronics CorporationInventors: Fang-Chen Luo, Chang-Cheng Lo
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Publication number: 20090305473Abstract: A method for fabricating a thin film transistor is provided. A gate is formed on a substrate. A gate insulating layer is formed on the substrate to cover the gate. A metal oxide material layer is formed on the gate insulating layer. A photoresist layer is formed on the metal oxide material layer, in which a thickness of the photoresist layer above the gate is larger than that of the photoresist layer above two sides adjacent to the gate. A portion of the metal oxide material layer is removed to form a metal oxide active layer by using the photoresist layer as a mask. The photoresist layer above the two sides adjacent to the gate is removed and the remaining photoresist layer covers a portion of the metal oxide active layer. A source and a drain are formed on the metal oxide active layer covered by the photoresist layer.Type: ApplicationFiled: October 27, 2008Publication date: December 10, 2009Applicants: TAIWAN TFT LCD ASSOCIATION, CHUNGHWA PICTURE TUBES, LTD., AU OPTRONICS CORPORATION, HANNSTAR DISPLAY CORPORATION, CHI MEI OPTOELECTRONICS CORPORATION, INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Fang-Chen Luo, Shuo-Wei Liang, Shin-Chuan Chiang, Chao-Nan Chen, Chin-Chih Yu
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Publication number: 20080239183Abstract: A stacked storage capacitor structure for use in each pixel of a TFT-LCD, wherein a first storage capacitor is formed by a first metal layer, a gate insulator layer and a second metal layer. The second capacitor is formed by the second metal layer, a passivation insulator layer and an ITO layer. The first metal layer and the ITO layer are joined together through a via hole which is etched in one insulator etching step during the overall fabrication process through both the gate insulator and the passivation insulator layers. As such, the two capacitors are connected in parallel in a stacked configuration. With the stacked storage capacitor structure, the charge storage capacity is increased without significantly affecting the aperture ratio of a pixel. The ITO and the pixel electrode can be different parts of an indium tine oxide layer deposited on the passivation insulator layer.Type: ApplicationFiled: April 24, 2008Publication date: October 2, 2008Inventors: Fang-Chen Luo, Chang-Cheng Lo
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Patent number: 7375372Abstract: A thin film transistor (TFT) and a manufacturing method thereof are provided. The thin film transistor (TFT) comprises a substrate, a gate, an inter-gate dielectric layer, a channel layer and source/drain regions. A gate is formed over the substrate. An inter-gate dielectric layer is formed over the substrate covering the gate. A doped amorphous silicon layer is formed over a portion of the inter-gate dielectric layer at least covering the gate to serve as channel layer. Next, source/drain regions are formed over the channel layer.Type: GrantFiled: January 26, 2006Date of Patent: May 20, 2008Assignee: Au Optronics CorporationInventors: Fang-Chen Luo, Wan-Yi Liu, Chieh-Chou Hsu
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Publication number: 20080043181Abstract: A liquid crystal display structure includes a first substrate panel, a second substrate panel, and a liquid crystal layer between the first substrate panel and the second substrate panel. Pixel portions, formed by respective electrodes for applying a voltage to the liquid crystal layer, include a transparent substrate panel, an organic insulating layer, a patterned reflective layer, a dielectric layer, a transparent conductive layer and a thin film transistor. The organic insulating layer is formed over the transparent substrate panel. The patterned reflective layer is formed over the organic insulating layer exposing a portion of the organic insulating layer. The dielectric layer is formed over the patterned reflective layer. The dielectric layer has a smooth upper surface. The transparent conductive layer is over the dielectric layer. The transparent conductive layer is connected to the thin film transistor so that the thin film transistor can drive the transparent conductive electrode.Type: ApplicationFiled: August 30, 2007Publication date: February 21, 2008Applicant: AU OPTRONICS CORPORATIONInventors: Fang-Chen Luo, Wei-Chih Chang
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Publication number: 20080043182Abstract: A liquid crystal display structure includes a first substrate panel, a second substrate panel, and a liquid crystal layer between the first substrate panel and the second substrate panel. Pixel portions, formed by respective electrodes for applying a voltage to the liquid crystal layer, include a transparent substrate panel, an organic insulating layer, a patterned reflective layer, a dielectric layer, a transparent conductive layer and a thin film transistor. The organic insulating layer is formed over the transparent substrate panel. The patterned reflective layer is formed over the organic insulating layer exposing a portion of the organic insulating layer. The dielectric layer is formed over the patterned reflective layer. The dielectric layer has a smooth upper surface. The transparent conductive layer is over the dielectric layer. The transparent conductive layer is connected to the thin film transistor so that the thin film transistor can drive the transparent conductive electrode.Type: ApplicationFiled: August 30, 2007Publication date: February 21, 2008Applicant: AU OPTRONICS CORPORATIONInventors: Fang-Chen Luo, Wei-Chih Chang
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Patent number: 7277145Abstract: A thin-film transistor array substrate, used in a transflective liquid crystal display. The thin-film transistor array substrate has a substrate, a plurality of pixels, a plurality of scan lines and a plurality of data lines. Each of the pixels has a transparent sub-pixel and a reflective sub-pixel, while the transparent sub-pixel further has a transparent electrode and a first thin-film transistor, and the reflective sub-pixel has a reflective pixel electrode and a second thin-film transistor. The pixel electrode of each sub-pixel is thus electrically connected to a different thin-film transistor. The step of forming a molybdenum layer is thus not required, saving fabrication cost.Type: GrantFiled: October 28, 2005Date of Patent: October 2, 2007Assignee: Au Optronics CorporationInventor: Fang-Chen Luo
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Patent number: 7224420Abstract: A thin-film transistor array substrate, used in a transflective liquid crystal display. The thin-film transistor array substrate has a substrate, a plurality of pixels, a plurality of scan lines and a plurality of data lines. Each of the pixels has a transparent sub-pixel and a reflective sub-pixel, while the transparent sub-pixel further has a transparent electrode and a first thin-film transistor, and the reflective sub-pixel has a reflective pixel electrode and a second thin-film transistor. The pixel electrode of each sub-pixel is thus electrically connected to a different thin-film transistor. The step of forming a molybdenum layer is thus not required, saving fabrication cost.Type: GrantFiled: October 28, 2005Date of Patent: May 29, 2007Assignee: Au Optronics CorporationInventor: Fang-Chen Luo
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Publication number: 20070114533Abstract: A thin film transistor (TFT) is provided. The thin film transistor (TFT) comprises a substrate, a gate, an inter-gate dielectric layer, a channel layer and source/drain regions. A gate is formed over the substrate. An inter-gate dielectric layer is formed over the substrate covering the gate. A doped amorphous silicon layer is formed over a portion of the inter-gate dielectric layer at least covering the gate to serve as channel layer. Source/drain regions are formed over the channel layer.Type: ApplicationFiled: January 19, 2007Publication date: May 24, 2007Applicant: AU OPTRONICS CORPORATIONInventors: Fang-Chen Luo, Wan-Yi Liu, Chieh-Chou Hsu
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Patent number: 7205171Abstract: A thin film transistor (TFT) and a manufacturing method thereof are provided. The thin film transistor (TFT) comprises a substrate, a gate, an inter-gate dielectric layer, a channel layer and source/drain regions. A gate is formed over the substrate. An inter-gate dielectric layer is formed over the substrate covering the gate. A doped amorphous silicon layer is formed over a portion of the inter-gate dielectric layer at least covering the gate to serve as channel layer. Next, source/drain regions are formed over the channel layer.Type: GrantFiled: September 23, 2004Date of Patent: April 17, 2007Assignee: Au Optronics CorporationInventors: Fang-Chen Luo, Wan-Yi Liu, Chieh-Chou Hsu
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Publication number: 20070044104Abstract: A computing environment and techniques are provided for processing work out of order in one or more processing contexts. The processing techniques include: determining, for a processing context having an associated stack of waiting resources, whether a last-in listed resource in the stack of waiting resource is available, and if so, resuming processing of a suspended unit of work requiring the last-in listed resource; and determining, otherwise, whether an out of order execution unit of work is available for processing in the context, and if so, processing the out of order execution unit of work while the suspended unit of work awaits the last-in listed resource. Out of order execution units of work can be processed in order from a regular unit of work queue, or out of order from an out of order unit of work queue of a processing context.Type: ApplicationFiled: August 18, 2005Publication date: February 22, 2007Applicant: International Business Machines CorporationInventors: Harry Beatty, Peter Elmendorf, Chen Luo
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Publication number: 20060197087Abstract: A thin film transistor (TFT) and a manufacturing method thereof are provided. The thin film transistor (TFT) comprises a substrate, a gate, an inter-gate dielectric layer, a channel layer and source/drain regions. A gate is formed over the substrate. An inter-gate dielectric layer is formed over the substrate covering the gate. A doped amorphous silicon layer is formed over a portion of the inter-gate dielectric layer at least covering the gate to serve as channel layer. Next, source/drain regions are formed over the channel layer.Type: ApplicationFiled: January 26, 2006Publication date: September 7, 2006Inventors: Fang-Chen Luo, Wan-Yi Liu, Chieh-Chou Hsu
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Patent number: 7084942Abstract: A thin-film transistor array substrate, used in a transflective liquid crystal display. The thin-film transistor array substrate has a substrate, a plurality of pixels, a plurality of scan lines and a plurality of data lines. Each of the pixels has a transparent sub-pixel and a reflective sub-pixel, while the transparent sub-pixel further has a transparent electrode and a first thin-film transistor, and the reflective sub-pixel has a reflective pixel electrode and a second thin-film transistor. The pixel electrode of each sub-pixel is thus electrically connected to a different thin-film transistor. The step of forming a molybdenum layer is thus not required, saving fabrication cost.Type: GrantFiled: May 26, 2003Date of Patent: August 1, 2006Assignee: Au Optronics CorporationInventor: Fang-Chen Luo
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Publication number: 20060119753Abstract: A stacked storage capacitor structure for use in each pixel of a TFT-LCD, wherein a first storage capacitor is formed by a first metal layer, a gate insulator layer and a second metal layer. The second capacitor is formed by the second metal layer, a passivation insulator layer and an ITO layer. The first metal layer and the ITO layer are joined together through a via hole which is etched in one insulator etching step during the overall fabrication process through both the gate insulator and the passivation insulator layers. As such, the two capacitors are connected in parallel in a stacked configuration. With the stacked storage capacitor structure, the charge storage capacity is increased without significantly affecting the aperture ratio of a pixel. The ITO and the pixel electrode can be different parts of an indium tine oxide layer deposited on the passivation insulator layer.Type: ApplicationFiled: December 3, 2004Publication date: June 8, 2006Inventors: Fang-Chen Luo, Chang-Cheng Lo
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Publication number: 20060038942Abstract: A thin-film transistor array substrate, used in a transflective liquid crystal display. The thin-film transistor array substrate has a substrate, a plurality of pixels, a plurality of scan lines and a plurality of data lines. Each of the pixels has a transparent sub-pixel and a reflective sub-pixel, while the transparent sub-pixel further has a transparent electrode and a first thin-film transistor, and the reflective sub-pixel has a reflective pixel electrode and a second thin-film transistor. The pixel electrode of each sub-pixel is thus electrically connected to a different thin-film transistor. The step of forming a molybdenum layer is thus not required, saving fabrication cost.Type: ApplicationFiled: October 28, 2005Publication date: February 23, 2006Inventor: Fang-Chen Luo