Patents by Inventor Chen Luo

Chen Luo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060119753
    Abstract: A stacked storage capacitor structure for use in each pixel of a TFT-LCD, wherein a first storage capacitor is formed by a first metal layer, a gate insulator layer and a second metal layer. The second capacitor is formed by the second metal layer, a passivation insulator layer and an ITO layer. The first metal layer and the ITO layer are joined together through a via hole which is etched in one insulator etching step during the overall fabrication process through both the gate insulator and the passivation insulator layers. As such, the two capacitors are connected in parallel in a stacked configuration. With the stacked storage capacitor structure, the charge storage capacity is increased without significantly affecting the aperture ratio of a pixel. The ITO and the pixel electrode can be different parts of an indium tine oxide layer deposited on the passivation insulator layer.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 8, 2006
    Inventors: Fang-Chen Luo, Chang-Cheng Lo
  • Publication number: 20060038942
    Abstract: A thin-film transistor array substrate, used in a transflective liquid crystal display. The thin-film transistor array substrate has a substrate, a plurality of pixels, a plurality of scan lines and a plurality of data lines. Each of the pixels has a transparent sub-pixel and a reflective sub-pixel, while the transparent sub-pixel further has a transparent electrode and a first thin-film transistor, and the reflective sub-pixel has a reflective pixel electrode and a second thin-film transistor. The pixel electrode of each sub-pixel is thus electrically connected to a different thin-film transistor. The step of forming a molybdenum layer is thus not required, saving fabrication cost.
    Type: Application
    Filed: October 28, 2005
    Publication date: February 23, 2006
    Inventor: Fang-Chen Luo
  • Publication number: 20060038943
    Abstract: A thin-film transistor array substrate, used in a transflective liquid crystal display. The thin-film transistor array substrate has a substrate, a plurality of pixels, a plurality of scan lines and a plurality of data lines. Each of the pixels has a transparent sub-pixel and a reflective sub-pixel, while the transparent sub-pixel further has a transparent electrode and a first thin-film transistor, and the reflective sub-pixel has a reflective pixel electrode and a second thin-film transistor. The pixel electrode of each sub-pixel is thus electrically connected to a different thin-film transistor. The step of forming a molybdenum layer is thus not required, saving fabrication cost.
    Type: Application
    Filed: October 28, 2005
    Publication date: February 23, 2006
    Inventor: Fang-Chen Luo
  • Publication number: 20060038941
    Abstract: A thin-film transistor array substrate, used in a transflective liquid crystal display. The thin-film transistor array substrate has a substrate, a plurality of pixels, a plurality of scan lines and a plurality of data lines. Each of the pixels has a transparent sub-pixel and a reflective sub-pixel, while the transparent sub-pixel further has a transparent electrode and a first thin-film transistor, and the reflective sub-pixel has a reflective pixel electrode and a second thin-film transistor. The pixel electrode of each sub-pixel is thus electrically connected to a different thin-film transistor. The step of forming a molybdenum layer is thus not required, saving fabrication cost.
    Type: Application
    Filed: October 28, 2005
    Publication date: February 23, 2006
    Inventor: Fang-Chen Luo
  • Patent number: 6997217
    Abstract: A gas conduit for a load lock chamber. The gas conduit connects to a gas source to introduce gas from the gas source into the load lock chamber of semiconductor equipment. The structure includes a filter mounted on the top surface of the load lock chamber, a pressure limitative device to maintain a preset pressure of gas source, and a gas inlet device including an inlet end connected to the pressure limitative device and an outlet end connected to the filter, wherein the gas inlet device introduces gas from the gas source into the load lock chamber with its maximum flow rate when breaching the vacuum therein.
    Type: Grant
    Filed: November 7, 2002
    Date of Patent: February 14, 2006
    Assignee: Macronix International Co., Ltd.
    Inventors: Shih-Hao Shih, Wei-Chen Chen, Chi-Chen Luo, Hsin-Cheng Liu, Andy Lin
  • Publication number: 20050176188
    Abstract: A thin film transistor (TFT) and a manufacturing method thereof are provided. The thin film transistor (TFT) comprises a substrate, a gate, an inter-gate dielectric layer, a channel layer and a source/drain regions. A gate is formed over the substrate. An inter-gate dielectric layer is formed over the substrate covering the gate. A doped amorphous silicon layer is formed over a portion of the inter-gate dielectric layer at least covering the gate to serve as channel layer. Next, source/drain regions are formed over the channel layer.
    Type: Application
    Filed: February 11, 2004
    Publication date: August 11, 2005
    Inventors: Fang-Chen Luo, Wan-Yi Liu, Chieh-Chou Hsu
  • Publication number: 20050176187
    Abstract: A thin film transistor (TFT) and a manufacturing method thereof are provided. The thin film transistor (TFT) comprises a substrate, a gate, an inter-gate dielectric layer, a channel layer and source/drain regions. A gate is formed over the substrate. An inter-gate dielectric layer is formed over the substrate covering the gate. A doped amorphous silicon layer is formed over a portion of the inter-gate dielectric layer at least covering the gate to serve as channel layer. Next, source/drain regions are formed over the channel layer.
    Type: Application
    Filed: September 23, 2004
    Publication date: August 11, 2005
    Inventors: Fang-Chen Luo, Wan-Yi Liu, Chieh-Chou Hsu
  • Patent number: 6888588
    Abstract: A LCD panel. The LCD panel includes first and second substrates, a black matrix, a color filter, a composite layer, a plurality of pixel elements, a transparent conductive layer, and a liquid crystal layer. The substrates are opposed to each other. The black matrix is disposed on the first substrate, and the color filter is disposed on the first substrate and at least a portion of the black matrix. The composite layer is disposed on the color filter and the black matrix. The pixel elements corresponding to the color filter are disposed on the composite layer and arranged as array. The transparent conductive layer is disposed on the second substrate. The liquid crystal layer formed between the first and second substrates.
    Type: Grant
    Filed: January 29, 2003
    Date of Patent: May 3, 2005
    Assignee: Au Optronics Corp.
    Inventor: Fang Chen Luo
  • Patent number: 6885416
    Abstract: A flat panel display with a non-matrix shielding structure. The non-matrix shielding structure comprises a main shielding structure which has gaps and main spacings substantially corresponding to the pixel regions, and complementary shielding structures corresponding to the gaps. Each gap substantially corresponds to the scan line or signal line. Each main spacing is connected to at least one of the gaps, and each gap is connected to two adjacent main spacings.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: April 26, 2005
    Assignee: AU Optronics Corp.
    Inventors: Fang-Chen Luo, Kuen-Wen Hu
  • Publication number: 20050007524
    Abstract: A flat panel display with a non-matrix shielding structure. The non-matrix shielding structure comprises a main shielding structure which has gaps and main spacings substantially corresponding to the pixel regions, and complementary shielding structures corresponding to the gaps. Each gap substantially corresponds to the scan line or signal line. Each main spacing is connected to at least one of the gaps, and each gap is connected to two adjacent main spacings.
    Type: Application
    Filed: July 7, 2003
    Publication date: January 13, 2005
    Inventors: Fang-Chen Luo, Kuen-Wen Hu
  • Publication number: 20040135939
    Abstract: A liquid crystal display (LCD) device with light shielding structure. Light shielding masks are disposed on the TFT substrate along each pixel electrode boundary and parallel to scan lines and data lines, partially overlapping the pixel electrodes. To provide a capacitor for each pixel area, bottom electrodes are a portion of the scan lines and protrude from the scan lines, the bottom electrodes partially overlapping the pixel electrodes. Upper electrodes and the data lines are on the same level and of the same material.
    Type: Application
    Filed: January 14, 2003
    Publication date: July 15, 2004
    Inventor: Fang-Chen Luo
  • Publication number: 20040004685
    Abstract: A thin-film transistor array substrate, used in a transflective liquid crystal display. The thin-film transistor array substrate has a substrate, a plurality of pixels, a plurality of scan lines and a plurality of data lines. Each of the pixels has a transparent sub-pixel and a reflective sub-pixel, while the transparent sub-pixel further has a transparent electrode and a first thin-film transistor, and the reflective sub-pixel has a reflective pixel electrode and a second thin-film transistor. The pixel electrode of each sub-pixel is thus electrically connected to a different thin-film transistor. The step of forming a molybdenum layer is thus not required, saving fabrication cost.
    Type: Application
    Filed: May 26, 2003
    Publication date: January 8, 2004
    Inventor: Fang-Chen Luo
  • Publication number: 20030142252
    Abstract: A LCD panel. The LCD panel includes first and second substrates, a black matrix, a color filter, a composite layer, a plurality of pixel elements, a transparent conductive layer, and a liquid crystal layer. The substrates are opposed to each other. The black matrix is disposed on the first substrate, and the color filter is disposed on the first substrate and at least a portion of the black matrix. The composite layer is disposed on the color filter and the black matrix. The pixel elements corresponding to the color filter are disposed on the composite layer and arranged as array. The transparent conductive layer is disposed on the second substrate. The liquid crystal layer formed between the first and second substrates.
    Type: Application
    Filed: January 29, 2003
    Publication date: July 31, 2003
    Applicant: AU OPTRONICS CORP.
    Inventor: Fang Chen Luo
  • Patent number: 6597015
    Abstract: A method of fabricating a thin-film transistor on an insulation substrate. A first conductive layer, a gate dielectric layer, a silicon layer and a doped silicon layer are formed on the insulation substrate. These four layers are patterned to form a gate and a gate line. A second conductive layer is formed over the insulation substrate. The second conductive layer and the doped silicon layer are patterned to form a source/drain region, a source/drain conductive layer and a source/drain line on both sides of the gate line. A protection layer is formed over the insulation layer, followed by a patterning step to form openings on the source/drain conductive layer and the source/drain line. A transparent conductive layer is formed on the protection layer and in the openings. After being patterned, a pixel electrode is formed, and a portion of the transparent conductive layer remains to electrically connect the source/drain line and the source/drain conductive layer.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: July 22, 2003
    Assignee: Unipac Optoelectronics Corp.
    Inventors: Chien-Sheng Yang, Fang-Chen Luo
  • Publication number: 20030076286
    Abstract: A liquid crystal display structure includes a first substrate panel, a second substrate panel, and a liquid crystal layer disposed between the first substrate panel and the second substrate panel. Pixel portions are formed by respective electrodes for applying a voltage to the liquid crystal layer. The pixel portions include a transparent substrate panel, an organic insulating layer, a patterned reflective layer, a dielectric layer, a transparent conductive layer and a thin film transistor. The organic insulating layer is formed over the transparent substrate panel. The patterned reflective layer is formed over the organic insulating layer exposing a portion of the organic insulating layer. The dielectric layer is formed over the patterned reflective layer. The dielectric layer has a smooth upper surface. The transparent conductive layer is over the dielectric layer.
    Type: Application
    Filed: September 17, 2002
    Publication date: April 24, 2003
    Inventors: Fang-Chen Luo, Wei-Chih Chang
  • Patent number: 6486009
    Abstract: A method of fabricating a thin-film transistor on an insulation substrate. A first conductive layer, a gate dielectric layer, a silicon layer and a doped silicon layer are formed on the insulation substrate. These four layers are patterned to form a gate and a gate line. A second conductive layer is formed over the insulation substrate. The second conductive layer and the doped silicon layer are patterned to form a source/drain region, a source/drain conductive layer and a source/drain line on both sides of the gate line. A protection layer is formed over the insulation layer, followed by a patterning step to form openings on the source/drain conductive layer and the source/drain line. A transparent conductive layer is formed on the protection layer and in the openings. After being patterned, a pixel electrode is formed, and a portion of the transparent conductive layer remains to electrically connect the source/drain line and the source/drain conductive layer.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: November 26, 2002
    Assignee: Unipac Optoelecyronics Corp.
    Inventors: Chien-Sheng Yang, Fang-Chen Luo
  • Publication number: 20020164860
    Abstract: A method of fabricating a thin-film transistor on an insulation substrate. A first conductive layer, a gate dielectric layer, a silicon layer and a doped silicon layer are formed on the insulation substrate. These four layers are patterned to form a gate and a gate line. A second conductive layer is formed over the insulation substrate. The second conductive layer and the doped silicon layer are patterned to form a source/drain region, a source/drain conductive layer and a source/drain line on both sides of the gate line. A protection layer is formed over the insulation layer, followed by a patterning step to form openings on the source/drain conductive layer and the source/drain line. A transparent conductive layer is formed on the protection layer and in the openings. After being patterned, a pixel electrode is formed, and a portion of the transparent conductive layer remains to electrically connect the source/drain line and the source/drain conductive layer.
    Type: Application
    Filed: May 22, 2002
    Publication date: November 7, 2002
    Inventors: Chien-Sheng Yang, Fang-Chen Luo
  • Publication number: 20010035528
    Abstract: A method of fabricating a thin-film transistor on an insulation substrate. A first conductive layer, a gate dielectric layer, a silicon layer and a doped silicon layer are formed on the insulation substrate. These four layers are patterned to form a gate and a gate line. A second conductive layer is formed over the insulation substrate. The second conductive layer and the doped silicon layer are patterned to form a source/drain region, a source/drain conductive layer and a source/drain line on both sides of the gate line. A protection layer is formed over the insulation layer, followed by a patterning step to form openings on the source/drain conductive layer and the source/drain line. A transparent conductive layer is formed on the protection layer and in the openings. After being patterned, a pixel electrode is formed, and a portion of the transparent conductive layer remains to electrically connect the source/drain line and the source/drain conductive layer.
    Type: Application
    Filed: April 27, 2001
    Publication date: November 1, 2001
    Inventors: Chien-Sheng Yang, Fang-Chen Luo
  • Patent number: 6038146
    Abstract: An AC-to-DC power converter (power supply) with high power factors and which minimizes the input charging current flowing through the separate inductor by locating the separate inductor between a full-bridge rectifier and the transformer but out of the storage capacitor's current path. In this manner, when the input voltage is sufficiently high, the converter draws input current into the transformer through the separate inductor, while current flowing to and charging the storage capacitor is unimpeded by the separate inductor. The current being drawn through the separate inductor and into the transformer may also be used to recharge the storage capacitor. Associated losses are reduced and the separate inductor may be reduced in size.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: March 14, 2000
    Assignee: Computer Products, Incorporated
    Inventors: Edward Han Chen Luo, Piotr Markowski, Fu-Sheng Tsai
  • Patent number: 5993419
    Abstract: A safety syringe includes a barrel having a front neck, a needle holder mounted in the front neck of the barrel to hold a needle unit outside the front neck of the barrel, the needle holder having a rear coupling hole, a plunger reciprocated in the barrel, and a coupling member connected to the plunger, the coupling member having a conical split head, which is forced into engagement with the rear coupling hole of the needle holder for enabling the needle holder and the needle unit to be carried backwards with the plunger and received inside the barrel after the use of the syringe.
    Type: Grant
    Filed: December 16, 1998
    Date of Patent: November 30, 1999
    Assignee: Pi-Chang Lo and Hui-Lin Tsao
    Inventors: Pi-Chang Lo, Chuan-Chen Luo