Abstract: A memory array and an operation method of the memory array are provided. The memory array includes first and second ferroelectric memory devices formed along a gate electrode, a channel layer and a ferroelectric layer between the gate electrode and the channel layer. The ferroelectric memory devices include: a common source/drain electrode and two respective source/drain electrodes, separately in contact with a side of the channel layer opposite to the ferroelectric layer, wherein the common source/drain electrode is disposed between the respective source/drain electrodes; and first and second auxiliary gates, capacitively coupled to the channel layer, wherein the first auxiliary gate is located between the common source/drain electrode and one of the respective source/drain electrodes, and the second auxiliary gate is located between the common source/drain electrode and the other respective source/drain electrode.

Abstract: A fluorine-containing elastomer composition includes a curable fluorine-containing polymer comprising at least one fluorinated cure site monomer having a cure site; an group IIIB element-containing reinforcing additive in an amount of 8 to 15 weight parts with respect to 100 weight parts of the curable fluorine-containing polymer; and a curative configured for curing the at least one fluorinated cure site monomer.

Abstract: A package structure and a package substrate thereof are provided. The package structure includes a package substrate, a chip and a molding compound. The package substrate has an upper surface and a lower surface. The lower surface has a molding area and a pad area. The molding area has at least one window opening penetrating the upper surface and the lower surface. The pad area is used for disposing at least one solder ball or at least one connecting pin. The package substrate includes a solder mask. The solder mask covers the lower surface of the package substrate. The solder mask has at least one groove. The groove is disposed between the molding area and the pad area. The chip disposed on the package substrate has an active surface. The active surface contacts with the upper surface of the package substrate. The molding area is covered by the molding compound.

Abstract: A package structure and a package substrate thereof are provided. The package structure includes a package substrate, a chip and a molding compound. The package substrate has an upper surface and a lower surface. The lower surface has a molding area and a pad area. The molding area has at least one window opening penetrating the upper surface and the lower surface. The pad area is used for disposing at least one solder ball or at least one connecting pin. The package substrate includes a solder mask. The solder mask covers the lower surface of the package substrate. The solder mask has at least one groove. The groove is disposed between the molding area and the pad area. The chip disposed on the package substrate has an active surface. The active surface contacts with the upper surface of the package substrate. The molding area is covered by the molding compound.