Abstract: A method for transferring a credit rights certificate is provided, including: generating a target account address according to a debtor account address and a creditor account address in a credit rights certificate transfer request, the target account address being a temporary account address used for storing a credit rights certificate and based on a multi-digital-signature process; transferring a credit rights certificate corresponding to the credit rights certificate transfer request from the debtor account address to the target account address; and transferring the credit rights certificate from the target account address to the creditor account address based on a confirmation instruction from the creditor account address.

Abstract: A photonic integrated circuit (PIC) includes a semiconductor substrate, one or more passive components, and one or more active components. The one or more passive components are fabricated on the semiconductor substrate, wherein the passive components are fabricated in a III-V type semiconductor layer. The one or more active components are fabricated on top of the one or more passive components, wherein optical signals are communicated between the one or more active components via the one or more passive components.

Abstract: A photonic integrated circuit (PIC) includes a semiconductor substrate, one or more passive components, and one or more active components. The one or more passive components are fabricated on the semiconductor substrate, wherein the passive components are fabricated in a III-V type semiconductor layer. The one or more active components are fabricated on top of the one or more passive components, wherein optical signals are communicated between the one or more active components via the one or more passive components.

Abstract: A photonic integrated circuit (PIC) includes a semiconductor substrate, one or more passive components, and one or more active components. The one or more passive components are fabricated on the semiconductor substrate, wherein the passive components are fabricated in a III-V type semiconductor layer. The one or more active components are fabricated on top of the one or more passive components, wherein optical signals are communicated between the one or more active components via the one or more passive components.

Abstract: A photonic integrated circuit (PIC) includes a semiconductor substrate, one or more passive components, and one or more active components. The one or more passive components are fabricated on the semiconductor substrate, wherein the passive components are fabricated in a III-V type semiconductor layer. The one or more active components are fabricated on top of the one or more passive components, wherein optical signals are communicated between the one or more active components via the one or more passive components.

Abstract: Embodiments of a business data promotion method, device, terminal and a computer-readable storage medium are provided. The method can include: acquiring historical behavior data of a user; acquiring a data item of the user's interest, according to the historical behavior data of the user; and for each business scenario, generating a personalized promotion data item of the user, based on the data item of the user's interest and a preset promotion data item. In an embodiment of the present application, a relatively reasonable guidance scheme is provided with respect to the promotion demands of different users, so as to improve the promotion effect to the user in different business scenarios and the effect of increasing the traffic.

Abstract: An ion source (1) to be used in optical thin film deposition by IAD process includes a discharge chamber (10), a gas source, an actuator (11), a grid assembly (20) and an outer shell (30). The grid assembly includes a screen grid (21), an accelerator grid (22) and a decelerator grid (23). The screen grid is kept at anode potential and is disposed near the ions. The accelerator grid is kept at cathode potential and is spaced from the screen grid. The decelerator grid is equal to the ground and is disposed beyond the accelerator grid. Each grid has a curved central portion (24) defining a plurality of apertures aligned with those of the other two grids to form extraction channels for an ion beam (40).

Abstract: The present invention provides a PMSCR (bridging modified lateral modified silicon controlled rectifier having first conductivity type) with a guard ring controlled circuit. The present invention utilizes controlled circuit such as switch to control functionally of guard ring of PMSCR. In normal operation, the switch is of low impedance such that the guard ring is short to anode and collects electrons to enhance the power-zapping immunity. Furthermore, during the ESD (electrostatic discharge) event, the switch is of high impedance such that the guard ring is non-functional. Thus, the PMSCR with guard ring control circuit can enhance both the ESD performance and the power-zapping immunity in the application of the HV (high voltage) pad.

Abstract: The present invention provides a PMSCR (bridging modified lateral modified silicon controlled rectifier having first conductivity type) with a guard ring controlled circuit. The present invention utilizes controlled circuit such as switch to control functionally of guard ring of PMSCR. In normal operation, the switch is of low impedance such that the guard ring is short to anode and collects electrons to enhance the power-zapping immunity. Furthermore, during the ESD (electrostatic discharge) event, the switch is of high impedance such that the guard ring is non-functional. Thus, the PMSCR with guard ring control circuit can enhance both the ESD performance and the power-zapping immunity in the application of the HV (high voltage) pad.

Abstract: The present invention provides a PMSCR (bridging modified lateral modified silicon controlled rectifier having first conductivity type) with a guard ring controlled circuit. The present invention utilizes controlled circuit such as switch to control functionally of guard ring of PMSCR. In normal operation, the switch is of low impedance such that the guard ring is short to anode and collects electrons to enhance the power-zapping immunity. Furthermore, during the ESD (electrostatic discharge) event, the switch is of high impedance such that the guard ring is non-functional. Thus, the PMSCR with guard ring control circuit can enhance both the ESD performance and the power-zapping immunity in the application of the HV (high voltage) pad.

Abstract: The present invention provides a PMSCR (bridging modified lateral modified silicon controlled rectifier having first conductivity type) with a guard ring controlled circuit. The present invention utilizes controlled circuit such as switch to control functionally of guard ring of PMSCR. In normal operation, the switch is of low impedance such that the guard ring is short to anode and collects electrons to enhance the power-zapping immunity. Furthermore, during the ESD (electrostatic discharge) event, the switch is of high impedance such that the guard ring is non-functional. Thus, the PMSCR with guard ring control circuit can enhance both the ESD performance and the power-zapping immunity in the application of the HV (high voltage) pad.

Abstract: An electrostatic discharge protection which is electrically coupled with an interface terminal and a devices area, at least include a first bipolar junction transistor, a second bipolar junction transistor, a first MOS transistor, and a second MOS transistor. Both bipolar junction transistors forms the well-known silicon controlled rectifier, first MOS transistor locates between interface terminal and second bipolar junction transistor and second MOS transistor locates between emitter of second bipolar junction transistor and ground point, and gates of both MOS transistor electrically coupled with voltage base point whose voltage is equal to work voltage of devices area. While devices area is turned off, silicon controlled rectifier would be latch-up and provides function of electrostatic discharge protection. While devices area is turned on, second MOS transistor also is turned on so that part of current flows into ground point but not flows into second bipolar junction transistor.

Abstract: A self-protected output driver for an integrated circuit utilizing cascode configured MOSFET transistors is formed in a single active region, allowing a smaller layout area without sacrificing performance. Furthermore, the driver is laid out according to a standard cell layout and is adaptable for a variety of output driving specifications according to the need of a particular implementation. A doped region having a first conductivity type is formed in the substrate. A plurality of sets of cascode connected transistors having channels in the doped region is included.

Abstract: The phosphonated fluorotelomers of this invention are, or can easily be made to be, hydrophilic. When blended with inert fibrous materials they can be used to make diaphragms for electrolytic cells, particularly for chlor-alkali cells used in the production of chlorine, hydrogen and sodium hydroxide from brine. Ion-exchange membranes can also be made from these fluorotelomers. The fluorotelomers can be made by using free radical phosphonyl esters to terminate the polymerization of the selected fluorocarbons.