Patents by Inventor Chen Shuo

Chen Shuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11764302
    Abstract: A thin film transistor includes a semiconductor layer, a first gate electrode disposed at one side of the semiconductor layer, a first gate insulating layer disposed between the first gate electrode and the semiconductor layer, a second gate electrode and a third gate electrode disposed at another side of the semiconductor layer, and a second gate insulating layer. The second gate electrode is separated from the third gate electrode. The second gate insulating layer is disposed between the second and third gate electrodes and the semiconductor layer. An orthogonal projection of the first gate electrode on the semiconductor layer is partially overlapped with an orthogonal projection of the second gate electrode on the semiconductor layer. The orthogonal projection of the first gate electrode on the semiconductor layer is partially overlapped with an orthogonal projection of the third gate electrode on the semiconductor layer.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: September 19, 2023
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Yang-Shun Fan, Chen-Shuo Huang
  • Publication number: 20230187513
    Abstract: A semiconductor device and a manufacturing method of the semiconductor device are provided. The semiconductor device includes a substrate, a semiconductor structure, a gate dielectric layer, and a first gate. The semiconductor structure is disposed above the substrate and includes two thick portions and a thin portion located between the two thick portions. A thickness of the two thick portions is larger than a thickness of the thin portion. The gate dielectric layer is disposed on the semiconductor structure. The first gate is disposed on the gate dielectric layer. A width of the first gate is smaller or equal to a width of the thin portion, and the first gate is overlapped with the thin portion in a normal direction of a top surface of the substrate. A doping concentration of the two portions is larger than a doping concentration of the thin portion.
    Type: Application
    Filed: November 24, 2022
    Publication date: June 15, 2023
    Applicant: AUO Corporation
    Inventor: Chen-Shuo Huang
  • Publication number: 20230187559
    Abstract: A semiconductor device, including a first gate, a second gate, a third gate, a first semiconductor layer, a second semiconductor layer, a source, and a drain, is provided. The first semiconductor layer is located between the first gate and the second gate. The second gate is located between the first semiconductor layer and the second semiconductor layer. The second semiconductor layer is located between the second gate and the third gate. The source is electrically connected to the first semiconductor layer and the second semiconductor layer. The drain is electrically connected to the first semiconductor layer and the second semiconductor layer.
    Type: Application
    Filed: August 2, 2022
    Publication date: June 15, 2023
    Applicant: AUO Corporation
    Inventors: Yen-Hao Chen, Chen-Shuo Huang, Yang-Shun Fan
  • Publication number: 20230187455
    Abstract: An active device substrate includes a substrate, a first semiconductor device and a second semiconductor device. The first semiconductor device and the second semiconductor device are disposed above the substrate. The first semiconductor device includes a first gate, a first semiconductor layer, a first source and a first drain. A first gate dielectric structure is sandwiched between the first gate and the first semiconductor layer. The first gate dielectric structure includes a stack of a portion of a gate dielectric layer and a portion of a ferroelectric material layer. The second semiconductor device is electrically connected to the first semiconductor device and includes a second gate, a second semiconductor layer, a second source and a second drain. Another part of the ferroelectric material layer is sandwiched between the second gate and the second semiconductor layer.
    Type: Application
    Filed: August 8, 2022
    Publication date: June 15, 2023
    Applicant: AUO Corporation
    Inventors: Yang-Shun Fan, Chen-Shuo Huang
  • Publication number: 20230187555
    Abstract: A semiconductor device, including a substrate, a semiconductor structure, a first gate dielectric layer, a first gate, a source, and a drain, is provided. The semiconductor structure includes a first metal oxide layer and a second metal oxide layer. The second metal oxide layer covers a top surface and a sidewall of the first metal oxide layer. The second metal oxide layer has a stepped structure at the sidewall of the first metal oxide layer. A carrier mobility of the first metal oxide layer is greater than a carrier mobility of a channel region of the second metal oxide layer. A thickness of the second metal oxide layer is greater than or equal to a thickness of the first metal oxide layer. A difference between a width of the first gate and a width of the first metal oxide layer is less than 0.5 ?m.
    Type: Application
    Filed: August 4, 2022
    Publication date: June 15, 2023
    Applicant: AUO Corporation
    Inventors: Chia-Wei Chiang, Yang-Shun Fan, Chen-Shuo Huang
  • Publication number: 20230187485
    Abstract: A semiconductor device and its manufacturing method are provided. The semiconductor device includes a substrate, an oxygen-containing protrusive structure disposed above the substrate, a metal oxide layer, a gate dielectric layer disposed on the metal oxide layer, and a gate disposed on the gate dielectric layer. The oxygen-containing protrusive structure has a first surface, a second surface opposite to the first surface, and sidewalls connected to the first and second surfaces. The metal oxide layer includes first, second, and third portions. The first portion covers the first surface. The second portion is connected to the first portion and covers the sidewalls of the oxygen-containing protrusive structure. A resistivity of the second portion gradually decreases away from the first portion. The third portion is connected to the second portion and extends from the sidewalls of the oxygen-containing protrusive structure in a direction away from the oxygen-containing protrusive structure.
    Type: Application
    Filed: November 23, 2022
    Publication date: June 15, 2023
    Applicant: AUO Corporation
    Inventor: Chen-Shuo Huang
  • Publication number: 20230187556
    Abstract: A semiconductor device includes a substrate, a semiconductor structure, a gate dielectric layer, a first gate, a source and a drain. The semiconductor structure is disposed above the substrate. The semiconductor structure includes a first thick portion, a second thick portion, and a thin portion between the first thick portion and the second thick portion. The gate dielectric layer is disposed on the semiconductor structure. The first gate is disposed on the gate dielectric layer. The first gate overlaps a portion of the first thick portion and a portion of the thin portion. The first gate does not overlap another portion of the thin portion and the second thick portion. The source is electrically connected to the first thick portion. The drain is electrically connected to the second thick portion.
    Type: Application
    Filed: November 17, 2022
    Publication date: June 15, 2023
    Applicant: AUO Corporation
    Inventor: Chen-Shuo Huang
  • Publication number: 20230187554
    Abstract: An active device substrate includes a substrate, a first thin film transistor located above the substrate and a second thin film transistor located above the substrate. The first thin film transistor includes a first metal oxide layer, a first gate, a first source and a first drain. A first gate dielectric layer and a second gate dielectric layer are located between the first gate and the first metal oxide layer. The second thin film transistor includes a second metal oxide layer, a second gate, a second source and a second drain. The second gate dielectric layer is located between the second gate and the second metal oxide layer, and the second metal oxide layer is located between the first gate dielectric layer and the second gate dielectric layer. The first gate and the second gate belong to a same patterned layer.
    Type: Application
    Filed: August 3, 2022
    Publication date: June 15, 2023
    Applicant: AUO Corporation
    Inventors: Chen-Shuo Huang, Shang-Lin Wu, Kuo-Kuang Chen, Chih-Hung Tsai
  • Publication number: 20230187484
    Abstract: A semiconductor device and its manufacturing method are provided. The semiconductor device includes a substrate, a semiconductor structure, a gate dielectric layer, and a gate. The semiconductor structure is disposed above the substrate. The semiconductor structure includes two thick portions and a thin portion located between the two thick portions. A thickness of the two thick portions is larger than a thickness of the thin portion. The gate dielectric layer is disposed on the semiconductor structure. The gate is disposed on the gate dielectric layer. A width of the gate is larger than a width of the thin portion, and the gate is overlapped with a part of the two thick portions and the thin portion in a normal direction of a top surface of the substrate. A resistivity of at least a part of the two thick portions gradually increases with proximity to the substrate.
    Type: Application
    Filed: November 23, 2022
    Publication date: June 15, 2023
    Applicant: AUO Corporation
    Inventor: Chen-Shuo Huang
  • Publication number: 20230189499
    Abstract: A memory device includes a substrate, an oxide insulating layer, a first metal oxide layer, a first gate dielectric layer, a second metal oxide layer, a second gate dielectric layer, a first gate, a source, and a drain. The oxide insulating layer is located above the substrate. The first metal oxide layer is located above the oxide insulating layer. The first gate dielectric layer is located above the first metal oxide layer. The second metal oxide layer is located above the first gate dielectric layer. The second gate dielectric layer is located above the second metal oxide layer. The first gate is located above the second gate dielectric layer. The second metal oxide layer is located between the first gate and the first metal oxide layer. The source and the drain are electrically connected to the first metal oxide layer.
    Type: Application
    Filed: November 17, 2022
    Publication date: June 15, 2023
    Applicant: AUO Corporation
    Inventor: Chen-Shuo Huang
  • Publication number: 20230084510
    Abstract: A thin film transistor includes a semiconductor layer, a first gate electrode disposed at one side of the semiconductor layer, a first gate insulating layer disposed between the first gate electrode and the semiconductor layer, a second gate electrode and a third gate electrode disposed at another side of the semiconductor layer, and a second gate insulating layer. The second gate electrode is separated from the third gate electrode. The second gate insulating layer is disposed between the second and third gate electrodes and the semiconductor layer. An orthogonal projection of the first gate electrode on the semiconductor layer is partially overlapped with an orthogonal projection of the second gate electrode on the semiconductor layer. The orthogonal projection of the first gate electrode on the semiconductor layer is partially overlapped with an orthogonal projection of the third gate electrode on the semiconductor layer.
    Type: Application
    Filed: October 26, 2021
    Publication date: March 16, 2023
    Applicant: Au Optronics Corporation
    Inventors: Yang-Shun Fan, Chen-Shuo Huang
  • Publication number: 20220254933
    Abstract: An active device substrate includes a substrate, an active device and a barrier layer. The active device is located on the substrate. The barrier layer is located on the active device. The barrier layer includes a first hydrogen atom distribution region and a second hydrogen atom distribution region. The first hydrogen atom distribution region includes silicon nitride and hydrogen atom. The first hydrogen atom distribution region is located between the second hydrogen atom distribution region and the substrate. The second hydrogen atom distribution region includes silicon nitride and hydrogen atom. The concentration of nitrogen atom in the first hydrogen atom distribution region is less than the concentration of nitrogen atom in the second hydrogen atom distribution region. The highest concentration of hydrogen atom in the first hydrogen atom distribution region is greater than the highest concentration of hydrogen atom in the second hydrogen atom distribution region.
    Type: Application
    Filed: January 11, 2022
    Publication date: August 11, 2022
    Applicant: Au Optronics Corporation
    Inventors: Chen-Shuo Huang, Kuo-Kuang Chen, Chih-Ling Hsueh
  • Publication number: 20220231170
    Abstract: An active element and a manufacturing method thereof are provided. The active element includes a substrate, a switching bottom gate and a driving bottom gate disposed on the substrate, a first gate insulating layer disposed on the substrate and covering the switching bottom gate and the driving bottom gate, a switching channel and a driving channel disposed on the first gate insulating layer, a second gate insulating layer disposed on the first gate insulating layer and covering the switching channel and the driving channel, and a switching top gate and a driving top gate disposed on the second gate insulating layer. The driving channel has a low potential end electrically connected to the driving bottom gate. A thickness of the second gate insulating layer is greater than a thickness of the first gate insulating layer. The switching top gate is electrically connected to the switching bottom gate.
    Type: Application
    Filed: October 27, 2021
    Publication date: July 21, 2022
    Applicant: Au Optronics Corporation
    Inventors: Yang-Shun Fan, Chen-Shuo Huang
  • Patent number: 11355569
    Abstract: An active device substrate includes a substrate, a silicon layer, a first insulating layer, a first gate, a first dielectric layer, a first transfer electrode, a second transfer electrode, and a second dielectric layer. Two openings penetrate through the first dielectric layer and overlap the silicon layer. The first transfer electrode and the second transfer electrode are respectively located in the two openings. The second dielectric layer is located on the first transfer electrode and the second transfer electrode. Two first through-holes penetrate through the second dielectric layer. The first transfer electrode and the second transfer electrode are etch stop layers of the two first through-holes.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: June 7, 2022
    Assignee: Au Optronics Corporation
    Inventors: Chen-Shuo Huang, Hung-Wei Li
  • Publication number: 20220027349
    Abstract: Indexed data structures are provided which are optimized for read and write performance in persistent memory of computing systems. Stored data may be searched by traversing an indexed data structure while still being sequentially written to persistent memory, so that the stored data may be accessed more efficiently than on non-volatile storage, while maintaining persistence against system failures such as power cycling. Mapping correspondences between leaf nodes of an indexed data structure and sequential elements of a sequential data structure may be stored in RAM, facilitating fast random access. Data writes are recorded as appended delta encodings which may be periodically compacted, avoiding write amplification inherent in persistent memory.
    Type: Application
    Filed: July 24, 2020
    Publication date: January 27, 2022
    Inventors: Chen Shuo, Qingda Lu, Jiesheng Wu, Zhu Pang, Yuanjiang Ni
  • Patent number: 11036094
    Abstract: A liquid crystal display device including a first flexible substrate, a plurality of first spacers, a second flexible substrate, a plurality of second spacers, and a liquid crystal layer is provided. The first spacers are disposed on the first flexible substrate, the second flexible substrate is disposed opposite to the first flexible substrate, the second spacers are disposed on the second flexible substrate, and the liquid crystal layer is disposed between the first flexible substrate and the second flexible substrate.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: June 15, 2021
    Assignee: InnoLux Corporation
    Inventors: Yu-Chih Tseng, Chu-Hong Lai, Kuo-Shun Tsai, Chen-Shuo Hsieh
  • Publication number: 20210175309
    Abstract: An active device substrate includes a substrate, a silicon layer, a first insulating layer, a first gate, a first dielectric layer, a first transfer electrode, a second transfer electrode, and a second dielectric layer. Two openings penetrate through the first dielectric layer and overlap the silicon layer. The first transfer electrode and the second transfer electrode are respectively located in the two openings. The second dielectric layer is located on the first transfer electrode and the second transfer electrode. Two first through-holes penetrate through the second dielectric layer. The first transfer electrode and the second transfer electrode are etch stop layers of the two first through-holes.
    Type: Application
    Filed: August 24, 2020
    Publication date: June 10, 2021
    Applicant: Au Optronics Corporation
    Inventors: Chen-Shuo Huang, Hung-Wei Li
  • Publication number: 20200249514
    Abstract: A liquid crystal display device including a first flexible substrate, a plurality of first spacers, a second flexible substrate, a plurality of second spacers, and a liquid crystal layer is provided. The first spacers are disposed on the first flexible substrate, the second flexible substrate is disposed opposite to the first flexible substrate, the second spacers are disposed on the second flexible substrate, and the liquid crystal layer is disposed between the first flexible substrate and the second flexible substrate.
    Type: Application
    Filed: December 31, 2019
    Publication date: August 6, 2020
    Inventors: Yu-Chih Tseng, Chu-Hong Lai, Kuo-Shun Tsai, Chen-Shuo Hsieh
  • Publication number: 20180206334
    Abstract: A metal-laminated structure is provided. The metal-laminated structure includes a substrate, a compressive stress layer disposed on the substrate, and at least one metal layer disposed on the compressive stress layer, wherein the thickness ratio of the metal layer to the compressive stress layer is in a range from 1 to 30. A high-frequency device including the metal-laminated structure is also provided.
    Type: Application
    Filed: December 22, 2017
    Publication date: July 19, 2018
    Inventors: I-Yin LI, Chia-Chi HO, Yi-Hung LIN, Chen-Shuo HSIEH, Ker-Yih KAO
  • Patent number: 9728592
    Abstract: A pixel structure includes a metal oxide semiconductor layer, a first insulating layer, a second insulating layer, a first conductive layer, a passivation layer, a second conductive layer and a pixel electrode. The metal oxide semiconductor layer includes a second semiconductor pattern. The first insulating layer includes a first capacitance dielectric pattern disposed on the second semiconductor pattern. The second insulating layer includes a second capacitance dielectric pattern disposed on the first capacitance dielectric pattern. The first conductive layer includes a electrode pattern disposed on the second capacitance dielectric pattern. The passivation layer covers the first conductive layer. The second conductive layer includes a second electrode disposed on the passivation layer. The second electrode is electrically connected to the second semiconductor pattern. The second electrode is disposed to overlap the electrode pattern.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: August 8, 2017
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Chen-Shuo Huang, Chih-Pang Chang, Hung-Wei Li