Abstract: A substrate assembly is provided, including a first substrate, an active element layer, a plurality of first electrodes, a circuit substrate, and a plurality of second electrodes. The active element layer is disposed on the first substrate. The plurality of first electrodes are disposed on the first substrate and arranged along a first direction. The circuit substrate is partially overlapping the first substrate in a vertical projection direction. The plurality of second electrodes are disposed on the circuit substrate. A distance between the edge of one of the plurality of second electrodes and the edge of one of the plurality of first electrodes is greater than zero in the first direction, and a width of the one of the plurality of first electrodes is different from a width of the one of the plurality of second electrodes.

Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). A method performed by a user equipment (UE) is provided that includes receiving, via a RRC signaling, SIB for two uplink carriers in one cell, the two uplink carriers including a first uplink carrier corresponding to a downlink carrier in which a downlink synchronization signal is received and a second uplink carrier, transmitting an uplink signal on one of the two uplink carriers configured to the UE.

Abstract: A method includes performing blind detection on a PDCCH in at least one subframe or slot to acquire first downlink control information and second downlink control information; and performing uplink data transmission and downlink data transmission with a base station according to the acquired first downlink control information and second downlink control information, wherein the first downlink control information is one of downlink control information for uplink scheduling grant and downlink control information for downlink scheduling, and the second downlink control information is the other one of the downlink control information for uplink scheduling grant and the downlink control information for downlink scheduling, and wherein a location where a PDCCH carrying the second downlink control information is detected is associated with related information of the first downlink control information, or the first downlink control information and the second downlink control information are carried on the same PDCCH.

Abstract: A terminal device and a method for measuring cross-link interference. The method includes receiving time-frequency resource configuration information from a base station, wherein the time-frequency resource configuration information includes configuration information of measurement time-frequency resources for measuring the cross-link interference. The method also includes determining measurement time-frequency resources for measuring the cross-link interference according to the time-frequency resource configuration information. The method further includes measuring the cross-link interference on the measured time-frequency resources and feeding back the measurement result of the cross-link interference to the base station.

Abstract: The disclosure relates to a 5th generation (5G) communication system or a 6th generation (6G) communication system for supporting a higher data rate than a 4th generation (4G) communication system, such as long term evolution (LTE). A method performed by a user equipment (UE) in a wireless communication system is provided.

Abstract: A method of cleaning a reticle includes applying ozone fluid over a surface of the reticle, and while the ozone fluid is over the surface of the reticle, irradiating the surface of the reticle with ultraviolet (UV) radiation for an irradiation time to treat the surface of the reticle. The method of cleaning the reticle further includes adjusting the irradiation time based on a reflected UV beam from the surface of the reticle.

Abstract: A method of treating a surface of a reticle includes retrieving a reticle from a reticle library and transferring the reticle to a treatment device. The surface of the reticle is treated in the treatment device by irradiating the surface of the reticle UV radiation while ozone fluid is over the surface of the reticle for a predetermined irradiation time. After the treatment, the reticle is transferred to an exposure device for lithography operation to generate a photo resist pattern on a wafer. A surface of the wafer is imaged to generate an image of the photo resist pattern on the wafer. The generated image of the photo resist pattern is analyzed to determine critical dimension uniformity (CDU) of the photo resist pattern. The predetermined irradiation time is increased if the CDU does not satisfy a threshold CDU.

Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first terminal coupled to a substrate of the semiconductor structure. The first terminal comprises a tunneling layer formed on the substrate, a first conductive structure formed on the tunneling layer, and a dielectric structure formed on a top surface and on a first curved side surface of the first conductive structure. The semiconductor structure includes a second terminal coupled to the substrate. The second terminal comprises a second conductive structure formed on an isolation structure. The second conductive structure has a second curved side surface, and the dielectric structure is disposed between the first curved side surface and the second curved side surface.

Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first terminal coupled to a substrate of the semiconductor structure, with the first terminal including a first portion of a tunneling layer formed on the substrate, and a first gate formed on the first portion of the tunneling layer. The semiconductor structure includes a second terminal coupled to the substrate and adjacent to the first terminal, with the second terminal including a second portion of the tunneling layer formed on the substrate, a second gate formed on the second portion of the tunneling layer, and a dielectric structure formed on a top surface and side surfaces of the second gate. The semiconductor structure includes a third terminal coupled to an insulating structure and adjacent to the second terminal, with the third terminal including, a third gate formed on the insulating structure.

Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first terminal coupled to a substrate of the semiconductor structure. The first terminal comprises a tunneling layer formed on the substrate, a first conductive structure formed on the tunneling layer, and a dielectric structure formed on a top surface and on a first curved side surface of the first conductive structure. The semiconductor structure includes a second terminal coupled to the substrate. The second terminal comprises a second conductive structure formed on an isolation structure. The second conductive structure has a second curved side surface, and the dielectric structure is disposed between the first curved side surface and the second curved side surface.

Abstract: An apparatus for generating an acoustic energy pulse and delivering it into a body is described. The apparatus includes a generator for creating an acoustic energy pulse having an energy density field that can be measured at all points within a space in the shape of an imaginary cylinder having a length greater than or equal to 2 cm and a diameter. The cylindrically shaped space has a cylinder longitudinal axis oriented relative to a longitudinal axis of the energy pulse at an angle in the range from zero to twenty degrees. A minimum energy density for the pulse at all locations within the cylindrically shaped space is at least 50% of a maximum energy density for the pulse within the space.

Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first terminal coupled to a substrate of the semiconductor structure, with the first terminal including a first portion of a tunneling layer formed on the substrate, and a first gate formed on the first portion of the tunneling layer. The semiconductor structure includes a second terminal coupled to the substrate and adjacent to the first terminal, with the second terminal including a second portion of the tunneling layer formed on the substrate, a second gate formed on the second portion of the tunneling layer, and a dielectric structure formed on a top surface and side surfaces of the second gate. The semiconductor structure includes a third terminal coupled to an insulating structure and adjacent to the second terminal, with the third terminal including, a third gate formed on the insulating structure.

Abstract: An apparatus for generating an acoustic energy pulse and delivering it into a body is described. The apparatus includes a generator for creating an acoustic energy pulse having an energy density field that can be measured at all points within a space in the shape of an imaginary cylinder having a length greater than or equal to 2 cm and a diameter. The cylindrically shaped space has a cylinder longitudinal axis oriented relative to a longitudinal axis of the energy pulse at an angle in the range from zero to twenty degrees. A minimum energy density for the pulse at all locations within the cylindrically shaped space is at least 50% of a maximum energy density for the pulse within the space.

Abstract: A field surveying and regulating method applied on at least one monitoring electronic device enables at least one manager to add at least one project and at least one specific location (spot) for obtaining soil samples and to edit the at least one project and the at least one spot on an online map. The method allows the manager to assign at least one soil drill and at least one drill operator for each project and each spot. The method enables the manager to view information as to position of each soil drill, depth for sampling by each soil drill, sampling time spent, actual work done by each soil drill, and photos of work by each soil drill in sampling. A related field surveying and regulating system is also disclosed.

Abstract: A reflective mask includes a reflective multilayer over a substrate, a capping layer over the reflective multilayer, an absorber layer over the capping layer and including a top surface, and a protection layer directly on the top surface of the absorber layer. The absorber layer is formed of a first material and the protection layer is formed of a second material that is less easily to be oxidized than the first material.

Abstract: In some implementations, one or more semiconductor processing tools may form a first terminal of a semiconductor device by depositing a tunneling oxide layer on a first portion of a body of the semiconductor device, depositing a first volume of polysilicon-based material on the tunneling oxide layer, and depositing a first dielectric layer on an upper surface and a second dielectric layer on a side surface of the first volume of polysilicon-based material. The one or more semiconductor processing tools may form a second terminal of the semiconductor device by depositing a second volume of polysilicon-based material on a second portion of the body of the semiconductor device. A side surface of the second volume of polysilicon-based material is adjacent to the second dielectric layer.

Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.

Abstract: A method of treating a surface of a reticle includes retrieving a reticle from a reticle library and transferring the reticle to a treatment device. The surface of the reticle is treated in the treatment device by irradiating the surface of the reticle UV radiation while ozone fluid is over the surface of the reticle for a predetermined irradiation time. After the treatment, the reticle is transferred to an exposure device for lithography operation to generate a photo resist pattern on a wafer. A surface of the wafer is imaged to generate an image of the photo resist pattern on the wafer. The generated image of the photo resist pattern is analyzed to determine critical dimension uniformity (CDU) of the photo resist pattern. The predetermined irradiation time is increased if the CDU does not satisfy a threshold CDU.

Abstract: A method of treating a surface of a reticle includes retrieving a reticle from a reticle library and transferring the reticle to a treatment device. The surface of the reticle is treated in the treatment device by irradiating the surface of the reticle UV radiation while ozone fluid is over the surface of the reticle for a predetermined irradiation time. After the treatment, the reticle is transferred to an exposure device for lithography operation to generate a photo resist pattern on a wafer. A surface of the wafer is imaged to generate an image of the photo resist pattern on the wafer. The generated image of the photo resist pattern is analyzed to determine critical dimension uniformity (CDU) of the photo resist pattern. The predetermined irradiation time is increased if the CDU does not satisfy a threshold CDU.

Abstract: The present application relates to the technical field of semiconductors, and provides a gallium nitride (GaN)-based high electron mobility transistor epitaxial wafer and a preparation method therefor. The GaN-based high electron mobility transistor epitaxial wafer comprises a substrate, and a buffer layer, a high-resistance buffer layer, a channel layer, an AlGaN barrier layer, and a cap layer which are stacked on the substrate; the cap layer comprises first sublayers and second sublayers which are grown alternately; the first sublayers are GaN layers; the second sublayers are InGaN layers; both the first sublayers and the second sublayers are doped with a main doping element; the main doping element is at least one of Be and Mg; the second sublayers are further doped with an auxiliary doping element; the auxiliary doping element is at least one of O, Mg, Si and Zn.