Patents by Inventor Chen Teh

Chen Teh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070024337
    Abstract: The semiconductor integrated circuit device is a semiconductor integrated circuit device having a pulse generator and a latch circuit. The pulse generator has a first charge/discharge path and a second charge/discharge path and a charge unit for pre-charging first nodes. The first charge/discharge path and the second charge/discharge path include: two first switching units, connected to the first nodes, and configured to control, according to an input signal, conduction and non-conduction of the first charge/discharge path and the second charge/discharge path; and a second switching unit, disposed between a second node and a reference voltage node, and configured to be turned on in a period prior to capturing the input signal to allow an electric charge accumulated at the second node to be discharged to the reference voltage node, and at the same time, configured to be turned on in a period of capturing the input signal to allow the first node to discharge.
    Type: Application
    Filed: June 28, 2006
    Publication date: February 1, 2007
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Chen Teh, Mototsugu Hamada
  • Publication number: 20060267627
    Abstract: A semiconductor integrated circuit device includes a comparator for making a comparison between a logical value of an input signal and a logical value of an output signal and outputting a combination signal having a combination of the logical values; and a flip-flop circuit configured to maintain a state of the output signal with electric power for maintaining the state less than electric power for state transition of the output signal in the case where the combination of the logical values of the combination signal is a predetermined combination, and wherein the comparator outputs the combination signal having the predetermined combination to an input terminal portion in the case of determining that the input signal does not vary the state of the output signal based on a result of the comparison between the logical value of the input signal and the logical value of the output signal.
    Type: Application
    Filed: May 24, 2006
    Publication date: November 30, 2006
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Chen Teh, Mototsugu Hamada