Patents by Inventor Chen Wen Huang

Chen Wen Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180247886
    Abstract: The disclosure provides a method for manufacturing an electronic package structure, including disposing on a carrier an electronic component and a conductive frame including a plurality of conductive pads and supporting parts; and covering the electronic component and the supporting parts of the conductive frame with an encapsulating layer while allowing the conductive pads to be exposed from the encapsulating layer, thereby increasing the efficiency and reducing the cost of manufacturing processes with the design of the conductive frame. The disclosure further provides the electronic package structure as described above.
    Type: Application
    Filed: May 9, 2017
    Publication date: August 30, 2018
    Inventors: Chih-Hsien Chiu, Tsung-Hsien Tsai, Hsin-Lung Chung, Chen-Wen Huang, Fang-Hsien Shen
  • Publication number: 20180063966
    Abstract: An electronic package structure is provided, which includes: a carrier; at least one electronic component and a plurality of conductive elements disposed on the carrier; a metal frame bonded to the conductive elements; and an encapsulant formed on the carrier and the metal frame and encapsulating the electronic component and the conductive elements. The metal frame is exposed from the encapsulant to serve as an electrical contact. As such, instead of using a mold having a particular size corresponding to the electronic package structure as in the prior art, the present disclosure can use a common mold to form the encapsulant, thereby reducing the fabrication cost. The present disclosure further provides a method for fabricating the electronic package structure.
    Type: Application
    Filed: May 30, 2017
    Publication date: March 1, 2018
    Inventors: Chih-Hsien Chiu, Chen-Wen Huang, Hsin-Lung Chung, Wen-Jung Tsai, Jia-Huei Hung, Fu-Tang Huang
  • Patent number: 9907186
    Abstract: An electronic package structure is provided, which includes: a carrier; at least one electronic component and a plurality of conductive elements disposed on the carrier; a metal frame bonded to the conductive elements; and an encapsulant formed on the carrier and the metal frame and encapsulating the electronic component and the conductive elements. The metal frame is exposed from the encapsulant to serve as an electrical contact. As such, instead of using a mold having a particular size corresponding to the electronic package structure as in the prior art, the present disclosure can use a common mold to form the encapsulant, thereby reducing the fabrication cost. The present disclosure further provides a method for fabricating the electronic package structure.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: February 27, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Chen-Wen Huang, Hsin-Lung Chung, Wen-Jung Tsai, Jia-Huei Hung, Fu-Tang Huang
  • Publication number: 20070279263
    Abstract: A network device communicating with a digital clock supply (DCS), a first network, and a second network, includes an input port, a parsing module, and a synthesis module. The input port receives a digital clock signal from the DCS. The parsing module parses the digital clock signal into a plurality of digital clock signals with different frequencies. The synthesis module uses the digital clock signals to synthesize a new digital clock signal. Phase of the new digital clock signal is the same as that of the digital clock signal from the DCS.
    Type: Application
    Filed: May 23, 2007
    Publication date: December 6, 2007
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Tsung-hsi Lee, Chen-wen Huang
  • Patent number: 6856207
    Abstract: A jitter-less phase detector in a clock recovery circuit is disclosed. A first control signal generating circuit generates a first control signal by inverting and delaying input data signals through half clock. A second control signal generating circuit generates a high level second control signal when the data signal changes. A phase comparator generates an up signal having a high-level from the falling edge of the first control signal to the falling edge of the second control signal, and generates a down signal having a high-level from the falling edge of the second control signal to the falling edge of the first control signal, so as to control a pair of current sources to selectively discharge and charge a capacitor.
    Type: Grant
    Filed: July 29, 2003
    Date of Patent: February 15, 2005
    Assignee: Sunplus Technology Co., Ltd.
    Inventor: Chen Wen Huang