Patents by Inventor Chen-Yen Liu

Chen-Yen Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090061578
    Abstract: A method of manufacturing a semiconductor microstructure comprises: forming a standard CMOS wafer with at least one micro-electro-mechanical structure on a top surface of a silicon substrate, forming at least one sacrificial layer and one resist layer sequentially on the top surface of the CMOS wafer; forming an etching resist layer on a lower rear surface of the silicon substrate, etching the lower rear surface of the silicon base by deep reactive ion etching or wet etching to form a space corresponding to the micro-electro-mechanical structure, and etching the CMOS wafer and the sacrificial layer, respectively, to cause suspension of the micro-electro-mechanical structure. Such arrangements effectively prevent the occurrence of undercut, reduce the exposure and possibility of damage of the micro-electro-mechanical structure, and effectively save the package cost.
    Type: Application
    Filed: August 30, 2007
    Publication date: March 5, 2009
    Inventors: Siew-Seong Tan, Chen-Yen Liu