Abstract: A method includes forming a dielectric layer over a contact pad of a device, forming a first polymer layer over the dielectric layer, forming a first conductive line and a first portion of a second conductive line over the first polymer layer, patterning a photoresist to form an opening over the first portion of the second conductive feature, wherein after patterning the photoresist the first conductive line remains covered by photoresist, forming a second portion of the second conductive line in the opening, wherein the second portion of the second conductive line physically contacts the first portion of the second conductive line, and forming a second polymer layer extending completely over the first conductive line and the second portion of the second conductive line.

Abstract: A package structure including a photonic, an electronic die, an encapsulant and a waveguide is provided. The photonic die includes an optical coupler. The electronic die is electrically coupled to the photonic die. The encapsulant laterally encapsulates the photonic die and the electronic die. The waveguide is disposed over the encapsulant and includes an upper surface facing away from the encapsulant. The waveguide includes a first end portion and a second end portion, the first end portion is optically coupled to the optical coupler, and the second end portion has a groove on the upper surface.

Abstract: A semiconductor memory device includes a substrate having a memory area and a logic circuit area thereon, a first interlayer dielectric layer on the substrate, and a second interlayer dielectric layer on the substrate. An embedded memory cell structure is disposed within the memory area between the first interlayer dielectric layer and the second interlayer dielectric layer. The second interlayer dielectric layer includes a first portion covering the embedded memory cell structure within the memory area and a second portion covering the logic circuit area. A top surface of the first portion is coplanar with a top surface of the second portion.

Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.

Abstract: A method for fabricating semiconductor device includes the steps of forming an inter-metal dielectric (IMD) layer on a substrate, forming a metal interconnection in the IMD layer, forming a magnetic tunneling junction (MTJ) on the metal interconnection, and performing a trimming process to shape the MTJ. Preferably, the MTJ includes a first slope and a second slope and the first slope is less than the second slope.

Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.

Abstract: A semiconductor package includes a first die stack structure and a second die stack structure, an insulating encapsulation, a redistribution structure, at least one prism structure and at least one reflector. The first die stack structure and the second die stack structure are laterally spaced apart from each other along a first direction, and each of the first die stack structure and the second die stack structure comprises an electronic die; and a photonic die electronically communicating with the electronic die. The insulating encapsulation laterally encapsulates the first die stack structure and the second die stack structure. The redistribution structure is disposed on the first die stack structure, the second die stack structure and the insulating encapsulation, and electrically connected to the first die stack structure and the second die stack structure. The at least one prism structure is disposed within the redistribution structure and optically coupled to the photonic die.

Abstract: A magnetoresistive random access memory (MRAM) structure, including a substrate and multiple MRAM cells on the substrate, wherein the MRAM cells are arranged in a memory region adjacent to a logic region. An ultra low-k (ULK) layer covers the MRAM cells, wherein the surface portion of ultra low-k layer is doped with fluorine, and dents are formed on the surface of ultra low-k layer at the boundaries between the memory region and the logic region.

Abstract: A resist material dispensing system includes a resist supply and a resist filter connected to the resist supply downstream from the resist supply. The resist material dispensing system includes a resist tank structure connected to the resist filter downstream from the resist filter and a resist pump device connected to the resist tank structure downstream from the resist tank structure. The resist tank structure is vertically arranged so that a resist material flows in a continuous downward flow from where the resist material enters the resist tank structure until the resist material exits the resist tank structure.

Abstract: A resist material dispensing system includes a resist supply and a resist filter connected to the resist supply downstream from the resist supply. The resist material dispensing system includes a resist tank structure connected to the resist filter downstream from the resist filter and a resist pump device connected to the resist tank structure downstream from the resist tank structure. The resist tank structure is vertically arranged so that a resist material flows in a continuous downward flow from where the resist material enters the resist tank structure until the resist material exits the resist tank structure.

Abstract: A lithography includes a storage tank that stores process chemical fluid, an anti-collision frame, and an integrated sensor assembly. The storage tank includes a dispensing port positioned at a lowest part of the storage tank in a gravity direction. The anti-collision frame is coupled to the storage tank. An integrated sensor assembly is disposed on at least one of the anti-collision frame and the storage tank to measure a variation in fluid quality in response to fluid quality measurement of fluid.

Abstract: A developer tool described herein includes a dispenser that includes a greater quantity of nozzles in a central portion relative to a perimeter portion such that the developer tool is capable of more effectively removing material from a photoresist layer near a center of a substrate (which tends to be thicker near the center of the substrate relative to the edge or perimeter of the substrate). In this way, the developer tool may reduce the amount of photoresist residue or scum remaining on the substrate near the center of the substrate after a development operation, which may enable defect removal and/or prevention, may increase semiconductor processing yield, and/or may increase semiconductor processing quality.

Abstract: A lithography includes a storage tank that stores process chemical fluid, an anti-collision frame, and an integrated sensor assembly. The storage tank includes a dispensing port positioned at a lowest part of the storage tank in a gravity direction. The anti-collision frame is coupled to the storage tank. An integrated sensor assembly is disposed on at least one of the anti-collision frame and the storage tank to measure a variation in fluid quality in response to fluid quality measurement of fluid.

Abstract: A developer tool described herein includes a dispenser that includes a greater quantity of nozzles in a central portion relative to a perimeter portion such that the developer tool is capable of more effectively removing material from a photoresist layer near a center of a substrate (which tends to be thicker near the center of the substrate relative to the edge or perimeter of the substrate). In this way, the developer tool may reduce the amount of photoresist residue or scum remaining on the substrate near the center of the substrate after a development operation, which may enable defect removal and/or prevention, may increase semiconductor processing yield, and/or may increase semiconductor processing quality.

Abstract: A method for processing a semiconductor wafer is provided. The method includes transferring the semiconductor wafer above a wafer placement device having a plate to align an edge of the semiconductor wafer with a first buffer member positioned in a peripheral region of the plate and to align a center of the semiconductor wafer with a second buffer member positioned in a central region of the plate. Each of the first buffer member and the second buffer member has a stiffness that is less than that of the plate. The method further includes lowering down the semiconductor wafer to place the semiconductor wafer over the plate.

Abstract: A dispensing system includes a dispense material supply that contains a dispense material and a dispensing pump connected downstream from the dispense material supply. The dispensing pump includes a body made of a first electrically conductive material, one or more first electrical contacts that are disposed on the body of the dispensing pump, and one or more first connection wires that are coupled between each one of the one or more first electrical contacts and ground. The dispensing system also includes a dispensing nozzle connected downstream from the dispensing pump and includes a tube made of a second electrically conductive material, one or more second electrical contacts that are disposed on an outer surface of the tube, and one or more second connection wires that are coupled between each one of the one or more second electrical contacts and the ground.

Abstract: A method includes providing a first plate including a first surface, a second surface opposite to the first surface, and a first recess indented from the first surface towards the second surface; providing a semiconductor structure including a third surface, a fourth surface opposite to the third surface, and a first sidewall extending between the third surface and the fourth surface; placing the semiconductor structure over the first plate; and disposing a priming material over the third surface of the semiconductor structure, wherein a peripheral portion of the fourth surface of the semiconductor structure is in contact with the first surface of the first plate upon the disposing of the priming material.

Abstract: A method includes providing a first plate including a first surface, a second surface opposite to the first surface, and a first recess indented from the first surface towards the second surface; providing a semiconductor structure including a third surface, a fourth surface opposite to the third surface, and a first sidewall extending between the third surface and the fourth surface; placing the semiconductor structure over the first plate; and disposing a priming material over the third surface of the semiconductor structure, wherein a peripheral portion of the fourth surface of the semiconductor structure is in contact with the first surface of the first plate upon the disposing of the priming material.

Abstract: A resist material dispensing system includes a resist supply and a resist filter connected to the resist supply downstream from the resist supply. The resist material dispensing system includes a resist tank structure connected to the resist filter downstream from the resist filter and a resist pump device connected to the resist tank structure downstream from the resist tank structure. The resist tank structure is vertically arranged so that a resist material flows in a continuous downward flow from where the resist material enters the resist tank structure until the resist material exits the resist tank structure.

Abstract: A developer tool described herein includes a dispenser that includes a greater quantity of nozzles in a central portion relative to a perimeter portion such that the developer tool is capable of more effectively removing material from a photoresist layer near a center of a substrate (which tends to be thicker near the center of the substrate relative to the edge or perimeter of the substrate). In this way, the developer tool may reduce the amount of photoresist residue or scum remaining on the substrate near the center of the substrate after a development operation, which may enable defect removal and/or prevention, may increase semiconductor processing yield, and/or may increase semiconductor processing quality.