Patents by Inventor Chen Ying-Hao

Chen Ying-Hao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220375970
    Abstract: A semiconductor arrangement is provided. The semiconductor arrangement includes a first component in a substrate. The semiconductor arrangement includes a gap fill layer. A first portion of the gap fill layer overlies the first component. The first portion of the gap fill layer has a tapered sidewall. A first portion of the substrate separates the first portion of the gap fill layer from the first component.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 24, 2022
    Inventors: Chia Jung HSU, Chia-Yu WEI, Kuo-Cheng LEE, Chen YING-HAO
  • Publication number: 20210366953
    Abstract: A semiconductor arrangement is provided. The semiconductor arrangement includes a first component in a substrate. The semiconductor arrangement includes a gap fill layer. A first portion of the gap fill layer overlies the first component. The first portion of the gap fill layer has a tapered sidewall. A first portion of the substrate separates the first portion of the gap fill layer from the first component.
    Type: Application
    Filed: May 21, 2020
    Publication date: November 25, 2021
    Inventors: Chia Jung HSU, Chia-Yu Wei, Kuo-Cheng Lee, Chen Ying-Hao
  • Publication number: 20140225215
    Abstract: A bonding pad structure for an image sensor device and a method of fabrication thereof. The image sensor device has a radiation-sensor region including a substrate and a radiation detection device, and a bonding pad region including the bonding pad structure. The bonding pad structure includes: an interconnect layer; an interlayer dielectric layer (IDL), both layers extending from under the substrate into the bonding pad region; an isolation layer formed on IDL; a conductive pad having a planar portion and one or more bridging portions extending perpendicularly from the planar portion, through the IDL and isolation layers, and to the interconnect layer; and a plurality of non-conducting stress-releasing structures disposed between the isolation layer and the conductive pad in such a way to adjoin its planar and the bridging portions together for releasing potential pulling stress applied thereon and preventing a conductive pad peeling.
    Type: Application
    Filed: February 8, 2013
    Publication date: August 14, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: VOLUME CHIEN, Chen I-Chih, Ying-Lang Wang, Chen Hsin-Chi, Chen Ying-Hao, Huang-Ta Huang