Abstract: The present disclosure relates to semiconductor processing methods for anisotropic film growth. The method includes heating a substrate positioned in a processing chamber. The method includes flowing one or more process gases over the substrate. The one or more process gases include trichlorosilane (TCS) and hydrochloric acid. The method includes depositing one or more layers on one or more fins on the substrate. The deposition of the one or more layers includes forming the one or more layers at a first growth rate along a first dimension and a second growth rate along a second dimension, and the second growth rate is faster than the first growth rate.

Abstract: Aspects of the present disclosure relate to apparatus, systems, and methods of using atomic hydrogen radicals with epitaxial deposition. In one aspect, nodular defects (e.g., nodules) are removed from epitaxial layers of substrate. In one implementation, a method of processing substrates includes selectively growing an epitaxial layer on one or more crystalline surfaces of a substrate. The epitaxial layer includes silicon. The method also includes etching the substrate to remove a plurality of nodules from one or more non-crystalline surfaces of the substrate. The etching includes exposing the substrate to atomic hydrogen radicals. The method also includes thermally annealing the epitaxial layer to an anneal temperature that is 600 degrees Celsius or higher.

Abstract: Embodiments of the present disclosure relate to chamber kits, processing chambers, and related methods and components for gas activation applicable for semiconductor manufacturing. In one or more embodiments, a processing chamber includes a chamber body and one or more heat sources configured to heat a processing volume of the chamber body. The chamber body includes one or more gas inject passages formed in the chamber body, and one or more gas exhaust passages formed in the chamber body. The processing chamber includes a first pre-heat ring that includes a first opaque surface, and a second pre-heat ring that includes a second opaque surface. The first pre-heat ring and the second pre-heat ring define a first gas flow path between the first opaque surface and the second opaque surface, and the first gas flow path in fluid communication with at least one of the one or more gas inject passages.

Abstract: Aspects of the present disclosure relate to apparatus, systems, and methods of using atomic hydrogen radicals with epitaxial deposition. In one aspect, nodular defects (e.g., nodules) are removed from epitaxial layers of substrate. In one implementation, a method of processing substrates includes selectively growing an epitaxial layer on one or more crystalline surfaces of a substrate. The epitaxial layer includes silicon. The method also includes etching the substrate to remove a plurality of nodules from one or more non-crystalline surfaces of the substrate. The etching includes exposing the substrate to atomic hydrogen radicals. The method also includes thermally annealing the epitaxial layer to an anneal temperature that is 600 degrees Celsius or higher.

Abstract: Embodiments described herein relate to a method of epitaxial deposition of p-channel metal oxide semiconductor (MMOS) source/drain regions within horizontal gate all around (hGAA) device structures. Combinations of precursors are described herein, which grow of the source/drain regions on predominantly <100> surfaces with reduced or negligible growth on <110> surfaces. Therefore, growth of the source/drain regions is predominantly located on the top surface of a substrate instead of the alternating layers of the hGAA structure. The precursor combinations include a silicon containing precursor, a germanium containing precursor, and a boron containing precursor. At least one of the precursors further includes chlorine.

Abstract: The present disclosure relates to overlapping substrate supports and pre-heat rings, and related process kits, processing chambers, methods, and components to facilitate process adjustability. In one or more embodiments, a substrate support applicable for use in semiconductor manufacturing includes a first side face and a second side face opposing the first side face. The first side face includes a support surface. The second side face includes a backside surface, and a first shoulder protruding relative to the backside surface. The first shoulder is disposed outwardly of the backside surface. The substrate support includes an arcuate outer face extending between the first side face and the second side face.

Abstract: A method of fabricating a semiconductor device includes forming an interconnect structure over a front side of a sensor substrate, thinning the sensor substrate from a back side of the sensor substrate, etching trenches into the sensor substrate, pre-cleaning an exposed surface of the sensor substrate, epitaxially growing a charge layer directly on the pre-cleaned exposed surface of the sensor substrate, and forming isolation structures within the etched trenches.

Abstract: A method for the selective formation of epitaxial layers is described herein. In the method, epitaxial layers are deposited to form source and drain regions around a horizontal gate all around (hGAA structure). The method includes co-flowing a combination of chlorinated silicon containing precursors, antimony containing precursors, and n-type dopant precursors. The resulting source and drain regions are selectively grown from crystalline nanosheets or nanowires of the hGAA structure over the non-crystalline gate structure and dielectric layers. The source and drain regions are predominantly grown in a <110> direction.

Abstract: Methods for selectively depositing an epitaxial layer are provided. In some implementations, the selective epitaxial deposition process includes providing the co-flow of chlorosilane precursors with at least one of an antimony-containing precursor and a phosphorous-containing precursor. The method utilizes co-flowing of multiple chlorosilane precursors to enable combination of silicon and at least one of phosphorous and antimony in the same matrix using a low-temperature selective process. The deposited epitaxial layer using the epitaxial deposition techniques described not only contains phosphorous and/or antimony but also has a high activated phosphorous and/or antimony concentration.

Abstract: One or more embodiments described herein relate to selective methods for fabricating devices and structures. In these embodiments, the devices are exposed inside the process volume of a process chamber. Precursor gases are flowed in the process volume at certain flow ratios and at certain process conditions. The process conditions described herein result in selective epitaxial layer growth on the {100} planes of the crystal planes of the devices, which corresponds to the top of each of the fins. Additionally, the process conditions result in selective etching of the {110} plane of the crystal planes, which corresponds to the sidewalls of each of the fins. As such, the methods described herein provide a way to grow or etch epitaxial films at different crystal planes. Furthermore, the methods described herein allow for simultaneous epitaxial film growth and etch to occur on the different crystal planes.

Abstract: A method for the selective formation of epitaxial layers is described herein. In the method, epitaxial layers are deposited to form source and drain regions around a horizontal gate all around (hGAA structure). The method includes co-flowing a combination of chlorinated silicon containing precursors, antimony containing precursors, and n-type dopant precursors. The resulting source and drain regions are selectively grown from crystalline nanosheets or nanowires of the hGAA structure over the non-crystalline gate structure and dielectric layers. The source and drain regions are predominantly grown in a <110> direction.

Abstract: Methods for depositing a silicon germanium tin boron (SiGeSn:B) film on a substrate are described. The method comprises exposing a substrate to a precursor mixture comprising a boron precursor, a silicon precursor, a germanium precursor, and a tin precursor to form a boron silicon germanium tin (SiGeSn:B) film on the substrate.

Abstract: Embodiments described herein relate to a method of epitaxial deposition of p-channel metal oxide semiconductor (MMOS) source/drain regions within horizontal gate all around (hGAA) device structures. Combinations of precursors are described herein, which grow of the source/drain regions on predominantly <100> surfaces with reduced or negligible growth on <110> surfaces. Therefore, growth of the source/drain regions is predominantly located on the top surface of a substrate instead of the alternating layers of the hGAA structure. The precursor combinations include a silicon containing precursor, a germanium containing precursor, and a boron containing precursor. At least one of the precursors further includes chlorine.

Abstract: Embodiments of the present disclosure generally relate to an integrated substrate processing system for cleaning a substrate surface and subsequently performing an epitaxial deposition process thereon. A processing system includes a film formation chamber, a transfer chamber coupled to the film formation chamber, and an oxide removal chamber coupled to the transfer chamber, the oxide removal chamber having a substrate support. The processing system includes a controller configured to introduce a process gas mixture into the oxide removal chamber, the process gas mixture including a fluorine-containing gas and a vapor including at least one of water, an alcohol, an organic acid, or combinations thereof. The controller is configured to expose a substrate positioned on the substrate support to the process gas mixture, thereby removing an oxide film from the substrate.

Abstract: One or more embodiments described herein relate to selective methods for fabricating devices and structures. In these embodiments, the devices are exposed inside the process volume of a process chamber. Precursor gases are flowed in the process volume at certain flow ratios and at certain process conditions. The process conditions described herein result in selective epitaxial layer growth on the {100} planes of the crystal planes of the devices, which corresponds to the top of each of the fins. Additionally, the process conditions result in selective etching of the {110} plane of the crystal planes, which corresponds to the sidewalls of each of the fins. As such, the methods described herein provide a way to grow or etch epitaxial films at different crystal planes. Furthermore, the methods described herein allow for simultaneous epitaxial film growth and etch to occur on the different crystal planes.

Abstract: A method for the selective formation of epitaxial layers is described herein. In the method, epitaxial layers are deposited to form source and drain regions around a horizontal gate all around (hGAA structure). The method includes co-flowing a combination of chlorinated silicon containing precursors, antimony containing precursors, and n-type dopant precursors. The resulting source and drain regions are selectively grown from crystalline nanosheets or nanowires of the hGAA structure over the non-crystalline gate structure and dielectric layers. The source and drain regions are predominantly grown in a <110> direction.

Abstract: Methods for depositing a silicon germanium tin boron (SiGeSn:B) film on a substrate are described. The method comprises exposing a substrate to a precursor mixture comprising a boron precursor, a silicon precursor, a germanium precursor, and a tin precursor to form a boron silicon germanium tin (SiGeSn:B) film on the substrate.

Abstract: Aspects of the present disclosure relate to apparatus, systems, and methods of using atomic hydrogen radicals with epitaxial deposition. In one aspect, nodular defects (e.g., nodules) are removed from epitaxial layers of substrate. In one implementation, a method of processing substrates includes selectively growing an epitaxial layer on one or more crystalline surfaces of a substrate. The epitaxial layer includes silicon. The method also includes etching the substrate to remove a plurality of nodules from one or more non-crystalline surfaces of the substrate. The etching includes exposing the substrate to atomic hydrogen radicals. The method also includes thermally annealing the epitaxial layer to an anneal temperature that is 600 degrees Celsius or higher.

Abstract: A method of fabricating a semiconductor device includes forming an interconnect structure over a front side of a sensor substrate, thinning the sensor substrate from a back side of the sensor substrate, etching trenches into the sensor substrate, pre-cleaning an exposed surface of the sensor substrate, epitaxially growing a charge layer directly on the pre-cleaned exposed surface of the sensor substrate, and forming isolation structures within the etched trenches.