Abstract: Provided herein are anti-CCR8 antibodies or antigen binding fragment thereof, which bind to CCR8, wherein the CCR8 is a human CCR8 and the antibody does not bind human CCR4. The anti-CCR8 antibodies or antigen binding fragment of the disclosure are useful for the treatment of cancer diseases through the elimination of regulatory T cells. Also provided herein are methods of use for the anti-CCR8 antibodies or antigen binding fragment thereof.

Abstract: Provided herein are anti-EGFRvII antibodies and binding fragments thereof. The anti-EGFRvIII antibodies of the disclosure are useful for the treatment of cancers through, e.g., antibody-dependent cell cytotoxicity (ADCC). Also provided herein are methods of making and using the anti-EGFRvIII antibodies for the treatment of cancer, and polynucleotides that encode the same.

Abstract: A package structure including a photonic, an electronic die, an encapsulant and a waveguide is provided. The photonic die includes an optical coupler. The electronic die is electrically coupled to the photonic die. The encapsulant laterally encapsulates the photonic die and the electronic die. The waveguide is disposed over the encapsulant and includes an upper surface facing away from the encapsulant. The waveguide includes a first end portion and a second end portion, the first end portion is optically coupled to the optical coupler, and the second end portion has a groove on the upper surface.

Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.

Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.

Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.

Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.

Abstract: A semiconductor package includes a first die stack structure and a second die stack structure, an insulating encapsulation, a redistribution structure, at least one prism structure and at least one reflector. The first die stack structure and the second die stack structure are laterally spaced apart from each other along a first direction, and each of the first die stack structure and the second die stack structure comprises an electronic die; and a photonic die electronically communicating with the electronic die. The insulating encapsulation laterally encapsulates the first die stack structure and the second die stack structure. The redistribution structure is disposed on the first die stack structure, the second die stack structure and the insulating encapsulation, and electrically connected to the first die stack structure and the second die stack structure. The at least one prism structure is disposed within the redistribution structure and optically coupled to the photonic die.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.

Abstract: The present application relates to a method for computing illumination mixed lights. The method includes the following. Acquire a first chromaticity coordinate point corresponding to a first colored light, and acquire a second chromaticity coordinate point corresponding to a second colored light. Acquire a target chromaticity coordinate point, and compute a first lumen mixing ratio of the first colored light and the second colored light. Determine a middle chromaticity coordinate point corresponding to a middle-colored light obtained by mixing according to the first lumen mixing ratio. Determine a first compensation colored light and a second compensation colored light which are matched with the middle chromaticity coordinate point. Conduct compensation computation on the middle colored light, and determine a second lumen mixing ratio corresponding to the first compensation colored light, the second compensation colored light and the middle colored light when mixed to the target chromaticity coordinate point.

Abstract: The present application relates to a method for computing illumination mixed lights. The method includes the following. Acquire a first chromaticity coordinate point corresponding to a first colored light, and acquire a second chromaticity coordinate point corresponding to a second colored light. Acquire a target chromaticity coordinate point, and compute a first lumen mixing ratio of the first colored light and the second colored light. Determine a middle chromaticity coordinate point corresponding to a middle-colored light obtained by mixing according to the first lumen mixing ratio. Determine a first compensation colored light and a second compensation colored light which are matched with the middle chromaticity coordinate point. Conduct compensation computation on the middle colored light, and determine a second lumen mixing ratio corresponding to the first compensation colored light, the second compensation colored light and the middle colored light when mixed to the target chromaticity coordinate point.

Abstract: The present invention provides a plasma torch device. The device comprises a front electrode, a back electrode and a vortex flow generator. The torch roots of the back electrode are moved by fixed magnets. By controlling the magnets coordinated with vortex air flow, the torch roots are moved back and forth periodically on inner surface of the back electrode. The torch roots do not stay at the same place for long for preventing increasing local heat burden of the electrode. Thus, life time and maintenance cycle of the electrode is prolonged with reduced operational cost of plasma torch and enhanced reliability of the device.

Abstract: Within a method for fabricating a split gate field effect transistor (FET) device there is employed a two step etch method for forming a floating gate electrode. Within the two step etch method there is employed a patterned first masking layer and a blanket second masking layer to assist in providing the floating gate electrode with a sharply pointed tip within at least either an upper edge of the floating gate electrode or sidewall of the floating gate electrode. The sharply pointed tip provides the split gate field effect transistor (FET) device with enhanced data erasure performance.

Abstract: Within a method for fabricating a split gate field effect transistor (FET) device there is employed a two step etch method for forming a floating gate electrode. Within the two step etch method there is employed a patterned first masking layer and a blanket second masking layer to assist in providing the floating gate electrode with a sharply pointed tip within at least either an upper edge of the floating gate electrode or sidewall of the floating gate electrode. The sharply pointed tip provides the split gate field effect transistor (FET) device with enhanced data erasure performance.