Abstract: A sampler circuit for use with a serial communication bus includes an amplifier circuit, an isolation circuit, and a latch circuit. During a first phase, the amplifier circuit amplifies a voltage difference between a first input signal and a second input signal received via the communication bus to generate a voltage difference on output nodes of the latch circuit. During an integration phase, the latch circuit increases the voltage difference on the output nodes. During a regeneration phase, the isolation circuit isolates the amplifier circuit from the latch circuit, which generates full-rail signals based on a voltage difference between the output nodes.

Abstract: An image display apparatus according to the present invention includes a housing, a front frame provided forward of the housing, and a display assembly accommodated in the housing. The display assembly includes a display and a transparent plate provided forward of the display. The transparent plate is larger in outer dimension than the display and has a flange portion extending outward with respect to an outer edge of the display. A seal member is interposed between the flange portion and an outer peripheral portion of the housing. When the housing and the front frame are fastened to each other, a front surface of the flange portion of the transparent plate is brought into pressure contact with a rear surface of the front frame, and the seal member is sandwiched between the front frame and the housing with a pressure applied thereto.