Patents by Inventor Chen-Yueh Li
Chen-Yueh Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8597968Abstract: An active device array substrate is provided. First, a substrate having a display area and a sensing area is provided. Then, a first patterned conductor layer is disposed on the display area of the substrate. A gate insulator is disposed on the substrate. A patterned semiconductor layer, a second patterned conductor layer and a patterned photosensitive dielectric layer are disposed on the gate insulator, wherein the second patterned conductor layer includes a source electrode, a drain electrode and a lower electrode, the patterned photosensitive dielectric layer covering the second patterned conductor layer includes an interface protection layer disposed on the source electrode and the drain electrode and a photo-sensing layer disposed on the lower electrode. A passivation layer is then disposed on the substrate. After that, a third patterned conductor layer including a pixel electrode and an upper electrode is disposed on the passivation layer.Type: GrantFiled: January 19, 2012Date of Patent: December 3, 2013Assignee: Au Optronics CorporationInventors: Yu-Cheng Chen, Chen-Yueh Li, Ching-Sang Chuang, Ching-Chieh Shih, An-Thung Cho
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Publication number: 20120280332Abstract: A method for fabricating a pixel structure is provided. A patterned semiconductor layer including a lower electrode, a doped source region, a doped drain region and a channel region is formed on a substrate. A gate dielectric layer is formed on the patterned semiconductor layer. A patterned first metal layer including a gate electrode, a scan line and a common electrode is formed on the gate dielectric layer, wherein the channel region is disposed below the gate electrode. A first dielectric layer and a first passivation layer are sequentially formed on the patterned first metal layer. A patterned second metal layer including a source, a drain and a data line is formed on the first passivation layer, wherein the data line is disposed above the common electrode, and the first dielectric layer and the first passivation layer are disposed between the data line and the common electrode.Type: ApplicationFiled: July 27, 2011Publication date: November 8, 2012Applicant: AU OPTRONICS CORPORATIONInventors: Jhen-Yu You, Chen-Yueh Li, Ming-Yan Chen
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Patent number: 8198149Abstract: A method for fabricating an active device array substrate is provided. A first patterned semiconductor layer, a gate insulator, a first patterned conductive layer and a first dielectric layer is sequentially formed on a substrate. First contact holes exposing the first patterned semiconductor layer are formed in the first dielectric layer and the gate insulator. A second patterned conductive layer and a second patterned semiconductor layer disposed thereon are simultaneously formed on the first dielectric layer. The second conductive layer includes contact conductors and a bottom electrode. The second patterned semiconductor layer includes an active layer. A second dielectric layer having second contact holes is formed on the first dielectric layer, wherein a portion of the second contact holes exposes the active layer. A third patterned conductive layer electrically connected to the active layer through a portion of the second contact holes is formed on the second dielectric layer.Type: GrantFiled: January 13, 2012Date of Patent: June 12, 2012Assignee: Au Optronics CorporationInventors: Ming-Wei Sun, Chen-Yueh Li, Yu-Cheng Chen, Chia-Tien Peng
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Publication number: 20120112214Abstract: An active device array substrate is provided. First, a substrate having a display area and a sensing area is provided. Then, a first patterned conductor layer is disposed on the display area of the substrate. A gate insulator is disposed on the substrate. A patterned semiconductor layer, a second patterned conductor layer and a patterned photosensitive dielectric layer are disposed on the gate insulator, wherein the second patterned conductor layer includes a source electrode, a drain electrode and a lower electrode, the patterned photosensitive dielectric layer covering the second patterned conductor layer includes an interface protection layer disposed on the source electrode and the drain electrode and a photo-sensing layer disposed on the lower electrode. A passivation layer is then disposed on the substrate. After that, a third patterned conductor layer including a pixel electrode and an upper electrode is disposed on the passivation layer.Type: ApplicationFiled: January 19, 2012Publication date: May 10, 2012Applicant: AU OPTRONICS CORPORATIONInventors: Yu-Cheng Chen, Chen-Yueh Li, Ching-Sang Chuang, Ching-Chieh Shih, An-Thung Cho
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Publication number: 20120115288Abstract: A method for fabricating an active device array substrate is provided. A first patterned semiconductor layer, a gate insulator, a first patterned conductive layer and a first dielectric layer is sequentially formed on a substrate. First contact holes exposing the first patterned semiconductor layer are formed in the first dielectric layer and the gate insulator. A second patterned conductive layer and a second patterned semiconductor layer disposed thereon are simultaneously formed on the first dielectric layer. The second conductive layer includes contact conductors and a bottom electrode. The second patterned semiconductor layer includes an active layer. A second dielectric layer having second contact holes is formed on the first dielectric layer, wherein a portion of the second contact holes exposes the active layer. A third patterned conductive layer electrically connected to the active layer through a portion of the second contact holes is formed on the second dielectric layer.Type: ApplicationFiled: January 13, 2012Publication date: May 10, 2012Applicant: AU OPTRONICS CORPORATIONInventors: Ming-Wei Sun, Chen-Yueh Li, Yu-Cheng Chen, Chia-Tien Peng
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Patent number: 8148185Abstract: A method for fabricating an active device array substrate is provided. First, a substrate having a display area and a sensing area is provided. Then, a first patterned conductor layer is formed on the display area of the substrate. A gate insulator is formed on the substrate. A patterned semiconductor layer, a second patterned conductor layer and a patterned photosensitive dielectric layer are formed on the gate insulator, wherein the second patterned conductor layer includes a source electrode, a drain electrode and a lower electrode, the patterned photosensitive dielectric layer covering the second patterned conductor layer includes an interface protection layer disposed on the source electrode and the drain electrode and a photo-sensing layer disposed on the lower electrode. A passivation layer is then formed on the substrate. After that, a third patterned conductor layer including a pixel electrode and an upper electrode is formed on the passivation layer.Type: GrantFiled: September 15, 2009Date of Patent: April 3, 2012Assignee: Au Optronics CorporationInventors: Yu-Cheng Chen, Chen-Yueh Li, Ching-Sang Chuang, Ching-Chieh Shih, An-Thung Cho
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Patent number: 8143117Abstract: A method for fabricating an active device array substrate is provided. A first patterned semiconductor layer, a gate insulator, a first patterned conductive layer and a first dielectric layer is sequentially formed on a substrate. First contact holes exposing the first patterned semiconductor layer are formed in the first dielectric layer and the gate insulator. A second patterned conductive layer and a second patterned semiconductor layer disposed thereon are simultaneously formed on the first dielectric layer. The second conductive layer includes contact conductors and a bottom electrode. The second patterned semiconductor layer includes an active layer. A second dielectric layer having second contact holes is formed on the first dielectric layer, wherein a portion of the second contact holes exposes the active layer. A third patterned conductive layer electrically connected to the active layer through a portion of the second contact holes is formed on the second dielectric layer.Type: GrantFiled: August 12, 2009Date of Patent: March 27, 2012Assignee: Au Optronics CorporationInventors: Ming-Wei Sun, Chen-Yueh Li, Yu-Cheng Chen, Chia-Tien Peng
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Patent number: 7973317Abstract: A method for fabricating an array substrate for a liquid crystal display (LCD) is provided. A semiconductor layer and a transparent lower electrode formed on a substrate is provided and covered by a first dielectric layer serving as a gate dielectric layer and a capacitor dielectric layer. A gate electrode and an upper electrode comprising a transparent electrode portion and a metal electrode portion are formed on the first dielectric layer and covered by a second dielectric layer. A source/drain electrode, a planarization layer, and a pixel electrode are sequentially formed on the second dielectric layer, in which the source/drain electrode is electrically connected to the semiconductor layer through the first and second dielectric layers and the pixel electrode is electrically connected to the source/drain electrode through the planarization layer. An array substrate for an LCD is also disclosed.Type: GrantFiled: April 1, 2010Date of Patent: July 5, 2011Assignee: Au Optronics Corp.Inventors: Yu-Cheng Chen, Chen-Yueh Li
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Publication number: 20100267177Abstract: A method for fabricating an active device array substrate is provided. First, a substrate having a display area and a sensing area is provided. Then, a first patterned conductor layer is formed on the display area of the substrate. A gate insulator is formed on the substrate. A patterned semiconductor layer, a second patterned conductor layer and a patterned photosensitive dielectric layer are formed on the gate insulator, wherein the second patterned conductor layer includes a source electrode, a drain electrode and a lower electrode, the patterned photosensitive dielectric layer covering the second patterned conductor layer includes an interface protection layer disposed on the source electrode and the drain electrode and a photo-sensing layer disposed on the lower electrode. A passivation layer is then formed on the substrate. After that, a third patterned conductor layer including a pixel electrode and an upper electrode is formed on the passivation layer.Type: ApplicationFiled: September 15, 2009Publication date: October 21, 2010Applicant: AU OPTRONICS CORPORATIONInventors: Yu-Cheng Chen, Chen-Yueh Li, Ching-Sang Chuang, Ching-Chieh Shih, An-Thung Cho
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Publication number: 20100230763Abstract: A method for fabricating an active device array substrate is provided. A first patterned semiconductor layer, a gate insulator, a first patterned conductive layer and a first dielectric layer is sequentially formed on a substrate. First contact holes exposing the first patterned semiconductor layer are formed in the first dielectric layer and the gate insulator. A second patterned conductive layer and a second patterned semiconductor layer disposed thereon are simultaneously formed on the first dielectric layer. The second conductive layer includes contact conductors and a bottom electrode. The second patterned semiconductor layer includes an active layer. A second dielectric layer having second contact holes is formed on the first dielectric layer, wherein a portion of the second contact holes exposes the active layer. A third patterned conductive layer electrically connected to the active layer through a portion of the second contact holes is formed on the second dielectric layer.Type: ApplicationFiled: August 12, 2009Publication date: September 16, 2010Applicant: Au Optronics CorporationInventors: Ming-Wei Sun, Chen-Yueh Li, Yu-Cheng Chen, Chia-Tien Peng
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Patent number: 7781272Abstract: A method for manufacturing the pixel structure of a liquid crystal display is provided. In comparison to using seven masks in the conventional lithographic processes for the pixel structure, only four masks are required in the manufacturing method of the present invention. Therefore, the cost of manufacturing is reduced. Furthermore, the unnecessary multilayer structures on the display area can be removed in the manufacturing processes, and thus, enhance the transmittance thereof.Type: GrantFiled: April 18, 2008Date of Patent: August 24, 2010Assignee: Au Optronics Corp.Inventor: Chen-Yueh Li
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Publication number: 20100187536Abstract: A method for fabricating an array substrate for a liquid crystal display (LCD) is provided. A semiconductor layer and a transparent lower electrode formed on a substrate is provided and covered by a first dielectric layer serving as a gate dielectric layer and a capacitor dielectric layer. A gate electrode and an upper electrode comprising a transparent electrode portion and a metal electrode portion are formed on the first dielectric layer and covered by a second dielectric layer. A source/drain electrode, a planarization layer, and a pixel electrode are sequentially formed on the second dielectric layer, in which the source/drain electrode is electrically connected to the semiconductor layer through the first and second dielectric layers and the pixel electrode is electrically connected to the source/drain electrode through the planarization layer. An array substrate for an LCD is also disclosed.Type: ApplicationFiled: April 1, 2010Publication date: July 29, 2010Applicant: AU OPTRONICS CORP.Inventors: Yu-Cheng Chen, Chen-Yueh Li
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Patent number: 7745243Abstract: A forming method of the present invention includes forming a first patterned conductive layer, which includes a transparent conductive layer and a metal layer stacked together on a substrate, where the first patterned conductive layer functions as gate lines, gate electrodes, common lines and predetermined transparent pixel electrode structures; and forming a second patterned conductive layer on the substrate. The second patterned conductive layer includes data lines and reflective pixel electrodes, and be directly connected to doping regions, such as source regions/drain regions. According to the forming method of the present invention, pixel structures of a transflective liquid crystal display device can be formed through five mask processes. Therefore, the manufacturing process of the transflective liquid crystal display device is effectively simplified, so the product yield is improved and the cost can be reduced.Type: GrantFiled: April 2, 2009Date of Patent: June 29, 2010Assignee: AU Optronics Corp.Inventors: Yu-Cheng Chen, Chen-Yueh Li, Ching-Sang Chuang, Kun-Chih Lin
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Patent number: 7727789Abstract: A method for fabricating an array substrate for a liquid crystal display (LCD) is provided. A semiconductor layer and a transparent lower electrode formed on a substrate is provided and covered by a first dielectric layer serving as a gate dielectric layer and a capacitor dielectric layer. A gate electrode and an upper electrode comprising a transparent electrode portion and a metal electrode portion are formed on the first dielectric layer and covered by a second dielectric layer. A source/drain electrode, a planarization layer, and a pixel electrode are sequentially formed on the second dielectric layer, in which the source/drain electrode is electrically connected to the semiconductor layer through the first and second dielectric layers and the pixel electrode is electrically connected to the source/drain electrode through the planarization layer. An array substrate for an LCD is also disclosed.Type: GrantFiled: May 29, 2008Date of Patent: June 1, 2010Assignee: Au Optronics Corp.Inventors: Yu-Cheng Chen, Chen-Yueh Li
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Publication number: 20100112737Abstract: A forming method of the present invention includes forming a first patterned conductive layer, which includes a transparent conductive layer and a metal layer stacked together on a substrate, where the first patterned conductive layer functions as gate lines, gate electrodes, common lines and predetermined transparent pixel electrode structures; and forming a second patterned conductive layer on the substrate. The second patterned conductive layer includes data lines and reflective pixel electrodes, and be directly connected to doping regions, such as source regions/drain regions. According to the forming method of the present invention, pixel structures of a transflective liquid crystal display device can be formed through five mask processes. Therefore, the manufacturing process of the transflective liquid crystal display device is effectively simplified, so the product yield is improved and the cost can be reduced.Type: ApplicationFiled: April 2, 2009Publication date: May 6, 2010Inventors: Yu-Cheng Chen, Chen-Yueh Li, Ching-Sang Chuang, Kun-Chih Lin
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Patent number: 7674658Abstract: A semiconductor device and a manufacturing method thereof are provided. The manufacturing method can form a structure of a thin film transistor (TFT) having a symmetric lightly doped region, and thus provide superior operation reliability and electrical performance. In addition, the manufacturing method forms gate patterns of different TFTs by the same mask process and thereby avoids the misalignment of masks so as to improve the processing yield and reduce the manufacturing cost.Type: GrantFiled: February 4, 2008Date of Patent: March 9, 2010Assignee: Au Optronics CorporationInventors: Chen-Yueh Li, Yi-Wei Chen, Ming-Yan Chen
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Publication number: 20090085037Abstract: A method for fabricating an array substrate for a liquid crystal display (LCD) is provided. A semiconductor layer and a transparent lower electrode formed on a substrate is provided and covered by a first dielectric layer serving as a gate dielectric layer and a capacitor dielectric layer. A gate electrode and an upper electrode comprising a transparent electrode portion and a metal electrode portion are formed on the first dielectric layer and covered by a second dielectric layer. A source/drain electrode, a planarization layer, and a pixel electrode are sequentially formed on the second dielectric layer, in which the source/drain electrode is electrically connected to the semiconductor layer through the first and second dielectric layers and the pixel electrode is electrically connected to the source/drain electrode through the planarization layer. An array substrate for an LCD is also disclosed.Type: ApplicationFiled: May 29, 2008Publication date: April 2, 2009Applicant: AU OPTRONICS CORP.Inventors: Yu-Cheng Chen, Chen-Yueh Li
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Publication number: 20090061571Abstract: A method for manufacturing the pixel structure of a liquid crystal display is provided. In comparison to using seven masks in the conventional lithographic processes for the pixel structure, only four masks are required in the manufacturing method of the present invention. Therefore, the cost of manufacturing is reduced. Furthermore, the unnecessary multilayer structures on the display area can be removed in the manufacturing processes, and thus, enhance the transmittance thereof.Type: ApplicationFiled: April 18, 2008Publication date: March 5, 2009Applicant: AU OPTRONICS CORP.Inventor: Chen-Yueh Li
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Publication number: 20080283923Abstract: A semiconductor device and a manufacturing method thereof are provided. The manufacturing method can form a structure of a thin film transistor (TFT) having a symmetric lightly doped region, and thus provide superior operation reliability and electrical performance. In addition, the manufacturing method forms gate patterns of different TFTs by the same mask process and thereby avoids the misalignment of masks so as to improve the processing yield and reduce the manufacturing cost.Type: ApplicationFiled: February 4, 2008Publication date: November 20, 2008Applicant: AU OPTRONICS CORPORATIONInventors: Chen-Yueh Li, Yi-Wei Chen, Ming-Yan Chen