Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated chip structure. The method may be performed by forming a plurality of interconnect layers within a first interconnect structure disposed over an upper surface of a first semiconductor substrate. An edge trimming process is performed to remove parts of the first interconnect structure and the first semiconductor substrate along a perimeter of the first semiconductor substrate. The edge trimming process results in the first semiconductor substrate having a recessed surface coupled to the upper surface by way of an interior sidewall disposed directly over the first semiconductor substrate. A dielectric protection layer is formed onto a sidewall of the first interconnect structure after performing the edge trimming process.

Abstract: Systems and methods are disclosed for measuring pulsed laser output. An example system comprises a laser configured to emit output in pulses; at least one sensor positioned to sense laser output and configured to convert that output into electrical signals; an edge detector configured to detect at least leading edges of a plurality of laser pulses; an analog to digital converter configured to convert electrical signals from a sensor into digital signals indicative of laser power output; and a controller; wherein, based on the detection of at least the leading edges of the laser pulses, the controller is configured to obtain samples of laser power output during the laser pulses. The system may refrain from sampling laser power output between laser pulses or may sample laser power output between laser pulses at a reduced sample rate. The system may use the samples of laser power output in a feedback loop to automatically adjust laser power.

Abstract: Embodiments of the present application provides a signal transmission method, a network device, and a terminal device, the method comprising: the network device transmits a first indication signal to the terminal device, the first indication signal being used for determining, by the terminal device, whether to perform downlink control channel monitoring in a search space associated with the first indication signal.

Abstract: Methods, systems and devices for resource reservations for relay nodes in 5G and New Radio (NR) networks are described. An exemplary method for wireless communication includes performing a first set of communications between a first relay node and at least one parent of the first relay node using transmission resources that are determined by at least a first type of resources, and performing a second set of communications between the first relay node and at least one child node of the first relay node using transmission resources that are determined by at least a second type of resources. Another exemplary method for wireless communication includes receiving a slot format message from a parent of the first relay node, where the slot format message is effective in a time offset, which is based on a hop index of the first relay node.

Abstract: An electrode structure includes a first electrode and a second electrode disposed opposite to each other. The first electrode has a first side and a second side. The second side is located between the first side and the second electrode. The first electrode has a maximum vertical length and a minimum vertical length from the first side to the second side, and a ratio of the minimum vertical length to the maximum vertical length is less than 0.8. The second electrode and the first electrode are separated by a first vertical gap and a second vertical gap, and the second vertical gap is greater than the first vertical gap.

Abstract: The present disclosure relates generally to a method for improving the performance of sintered NdFeB magnet. A method of preparing a sintered NdFeB magnet therefore comprises the steps of: a) preparing alloy flakes from a raw material of the NdFeB magnet by a strip casting process; and b) preparing a coarse alloy powder from the alloy flakes by a hydrogen decrepitation process, the hydrogen decrepitation process including treatment of the alloy flakes under a hydrogen pressure of 0.10 MPa to 0.25 MPa for a duration of 1 to 3.5 hours, then degassing the hydrogen at a predetermined temperature between 300° C. to 400° C. for a duration time of 0.5 to 5 hours, and then mixing the resulting coarse alloy powder with a lubricant.

Abstract: A wafer processing method for processing a wafer formed on a front surface thereof with a plurality of devices having projection-shaped electrodes, the devices being partitioned by streets, includes a cutting step of holding a back surface of the wafer by a holding surface of a chuck table and cutting head portions of the projection-shaped electrodes by a cutting tool slewed in parallel to the holding surface, to make uniform the electrodes in height and expose metallic surfaces; a thermocompression bonding sheet laying step of laying a thermocompression bonding sheet on the front surface of the wafer; a thermocompression bonding step of heating and pressing the thermocompression bonding sheet to perform thermocompression bonding; and a peeling step of peeling off the thermocompression bonding sheet from the wafer, before dividing the wafer into individual device chips and bonding the electrodes to a circuit board.

Abstract: In an embodiment, a method includes: forming a gate dielectric layer on an interface layer; forming a doping layer on the gate dielectric layer, the doping layer including a dipole-inducing element; annealing the doping layer to drive the dipole-inducing element through the gate dielectric layer to a first side of the gate dielectric layer adjacent the interface layer; removing the doping layer; forming a sacrificial layer on the gate dielectric layer, a material of the sacrificial layer reacting with residual dipole-inducing elements at a second side of the gate dielectric layer adjacent the sacrificial layer; removing the sacrificial layer; forming a capping layer on the gate dielectric layer; and forming a gate electrode layer on the capping layer.

Abstract: An integrated circuit apparatus includes a silicon-on-insulator (SOI) substrate comprising a silicon layer overlying an insulator layer; a first silicon fin region formed in a first region of the silicon layer, the first silicon fin region comprising a first source region, a first drain region, and a first channel region; a second silicon fin region formed in a second region of the silicon layer, the second silicon fin region comprising a second source region, a second drain region, and a second channel region; a gate dielectric layer formed on the first, second, and third surface regions of the first silicon fin region, and on the third and fourth surface regions of the second silicon fin region; a dual-gate FinFET, comprising the second drain, source and channel regions in the second silicon fin region; and a tri-gate FinFET, comprising the first drain, source and channel regions.

Abstract: An outlet structure of a faucet valve seat, has a valve seat and a sleeve pipe, wherein the valve seat forms a sleeve hole, the sleeve pipe is used to set an outlet pipe, and the sleeve pipe is sleeved in the sleeve hole. The sleeve pipe penetrates through a plug hole, and one end of the outlet pipe is inserted into the plug hole, such that a long axis is parallel to the central axis of the valve core, and a central axis of the plug hole forms an included angle with the long axis as ?. The valve seat can be selected by the sleeve pipe with the corresponding angle of the plug hole according to the needs of the outlet pipe, and meet the diversified demand of the outlet pipe elevation angle.

Abstract: Examples described herein can be used to calibrate resistances provided by pull-up and pull-down circuits in an output driver circuit. A first reference voltage can be determined and applied to set a resistance level of a pull-up circuit to a desired level. A code for activating one or more transistor in the pull-up circuit can be determined against the first reference voltage. For a pull-down circuit, a second reference voltage can be set a resistance level of the pull-down circuit to a desired level. The resistance level of the pull-down circuit can be set to equal to the resistance level of the pull-up circuit. A second code can be set for activating one or more transistor in the pull-down circuit. The first and second reference voltages can be represented by index values. The code and second code can be stored for use by the pull-up circuit and pull-down circuit. Re-calibration of the pull-up and pull-down circuits can be performed to determine codes using the first and second reference voltages.

Abstract: Provided are a zero-crossing detection device and a method thereof, a no-neutral switch, a storage medium and a processor. The no-neutral switch may include a switch element, the switch element has a first end connected to a power supply and a second end connected to a load, and the zero-crossing detection device may include: a sampling module configured to sample a first signal of the first end of the switch element and a second signal of the second end of the switch element; a comparison module configured to compare a deviation of the first signal and the second signal with a preset threshold; and a computing module configured to compute a zero-crossing point of the power supply according to a comparison result of the comparison module and the preset threshold.

Abstract: An apparatus includes a temperature sensor configured to measure a temperature of a dry-type transformer, and the temperature sensor is arranged on or proximate a conductor of the dry-type transformer and is covered by an insulating layer of the conductor. The apparatus further includes a passive wireless communication module configured to transmit the measured temperature to a reader. The temperature of the dry-type transformer can be measured accurately, thereby improving the reliability and safety of the dry-type transformer. Accordingly, temperature measurement for the dry-type transformer can work appropriately in a cost-effective and efficient way.

Abstract: A testing system includes: a signal generator arranged to generate a testing signal; a dividing circuit coupled to the signal generator for providing a plurality of input signals according to the testing signal; and a plurality of power-amplifier chips coupled to the dividing circuit for being tested by generating a plurality of output signals for a predetermined testing time according to the plurality of input signals respectively.

Abstract: Certain aspects of the present disclosure provide techniques for uplink control information (UCI) transmission for overlapping physical uplink shared channel (PUSCH) and physical uplink control channel (PUCCH) resource assignments with repetition. A method of wireless communication by a user equipment (UE) is provided. The method generally includes receiving scheduling to transmit on the PUSCH in a first one or more slots associated with a first number of repetitions and scheduling to transmit on the PUCCH in a second one or more slots associated with a second number of repetitions. The scheduled transmissions overlap in at least one slot. The method includes determining which channel to transmit UCI on and which channel to drop for each of the first and second one or more slots. The method includes transmitting or dropping the UCI in the first and second one or more slots in accordance with the determination.

Abstract: A measurement gap configuration method and a device are provided. The method includes: sending, by a secondary node, first indication information or second indication information to a master node; receiving, by the master node, the first indication information or the second indication information sent by the secondary node, wherein the first indication information is used to indicate that the secondary node needs to configure a terminal to perform an E-UTRAN inter-frequency measurement, or is used to request the master node to configure a measurement gap, the second indication information is used to indicate that the secondary node does not need to configure a terminal to perform an E-UTRAN inter-frequency measurement, or is used for not requesting the master node to configure a measurement gap.

Abstract: The present invention provides a method for calibrating verticality of a particle beam. The method includes: providing a baseplate having a first sensor and a second sensor; emitting the particle beam to the first sensor of the baseplate from an emitter, such that a first datum is collected when the first sensor receives the particle beam; emitting the particle beam to the second sensor of the baseplate from the emitter, such that a second datum is collected when the second sensor receives the particle beam; calculating a first calibrating datum based on the first datum and the second datum; and adjusting the baseplate or the emitter based on the first calibrating datum if the first calibrating datum is out of a first predetermined range.

Abstract: A user equipment (UE) includes one or more non-transitory computer-readable media containing computer-executable instructions embodied therein and at least one processor coupled to the one or more non-transitory computer-readable media. The at least one processor is configured to receive through a serving cell of a first Radio Access Technology (RAT), a sidelink resource configuration of a second RAT, determine first validity area information associated with the first RAT and second validity area information associated with the second RAT, the first validity area information and the second validity area information being associated with different frequency carriers, and identify a validity area of the sidelink resource configuration based on the first validity area information and the second validity area information.

Abstract: A data archiving method includes obtaining a data format of data to be processed, searching for a data category corresponding to the data format in a first database, extracting feature information of the data to be processed according to a first preset rule if the data category corresponding to the data format is found and storing the feature information in the first database according to a storage rule, and searching the data category corresponding to the data format in a second database according to a second preset rule if no data category corresponding to the data format is found, extracting feature information of the data to be processed, and storing the extracted feature information in the first database according to the storage rule. The first database stores data categories of different data formats of processed data. The second database stores feature information of multiple data categories.

Abstract: An embodiment device includes: a first dielectric layer; a first photonic die and a second photonic die disposed adjacent a first side of the first dielectric layer; a waveguide optically coupling the first photonic die to the second photonic die, the waveguide being disposed between the first dielectric layer and the first photonic die, and between the first dielectric layer and the second photonic die; a first integrated circuit die and a second integrated circuit die disposed adjacent the first side of the first dielectric layer; conductive features extending through the first dielectric layer and along a second side of the first dielectric layer, the conductive features electrically coupling the first photonic die to the first integrated circuit die, the conductive features electrically coupling the second photonic die to the second integrated circuit die; and a second dielectric layer disposed adjacent the second side of the first dielectric layer.