Patents by Inventor Chendong Zhu

Chendong Zhu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8564074
    Abstract: A semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate including: a high-K dielectric region; a blocking region disposed against at least one surface of the high-K dielectric region and adapted to form an oxidized layer in response to exposure to oxygen; and an oxygen rich region disposed against the blocking region such that the blocking region is interposed between the oxygen rich region and the high-K dielectric region.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: October 22, 2013
    Assignee: International Business Machines Corporation
    Inventors: Terence B. Hook, Vijay Narayanan, Jay M. Shah, Melanie J. Sherony, Kenneth J. Stein, Helen H. Wang, Chendong Zhu
  • Publication number: 20130134545
    Abstract: A semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate including: a high-K dielectric region; a blocking region disposed against at least one surface of the high-K dielectric region and adapted to form an oxidized layer in response to exposure to oxygen; and an oxygen rich region disposed against the blocking region such that the blocking region is interposed between the oxygen rich region and the high-K dielectric region.
    Type: Application
    Filed: November 29, 2011
    Publication date: May 30, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Terence B. Hook, Vijay Narayanan, Jay M. Shah, Melanie J. Sherony, Kenneth J. Stein, Helen H. Wang, Chendong Zhu
  • Patent number: 7879666
    Abstract: A semiconductor process and apparatus fabricate a metal gate electrode (30) and an integrated semiconductor resistor (32) by forming a metal-based layer (26) and semiconductor layer (28) over a gate dielectric layer (24) and then selectively implanting the resistor semiconductor layer (28) in a resistor area (97) to create a conductive upper region (46) and a conduction barrier (47), thereby confining current flow in the resistor semiconductor layer (36) to only the top region (46) in the finally formed device.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: February 1, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Da Zhang, Chendong Zhu, Xiangdong Chen, Melanie Sherony
  • Publication number: 20100019328
    Abstract: A semiconductor process and apparatus fabricate a metal gate electrode (30) and an integrated semiconductor resistor (32) by forming a metal-based layer (26) and semiconductor layer (28) over a gate dielectric layer (24) and then selectively implanting the resistor semiconductor layer (28) in a resistor area (97) to create a conductive upper region (46) and a conduction barrier (47), thereby confining current flow in the resistor semiconductor layer (36) to only the top region (46) in the finally formed device.
    Type: Application
    Filed: July 23, 2008
    Publication date: January 28, 2010
    Inventors: Da Zhang, Chendong Zhu, Xiangdong Chen, Melanie Sherony
  • Publication number: 20100006841
    Abstract: Structures are presented including a high-k and metal gate transistor and a resistor where the resistor includes a dielectric layer between a metal and a polysilicon. The resistor provides typical polysilicon resistor performance with less cost and higher throughput.
    Type: Application
    Filed: July 11, 2008
    Publication date: January 14, 2010
    Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION, FREESCALE SEMICONDUCTOR INC.
    Inventors: Weipeng Li, Chendong Zhu, Sri Samavedam