Patents by Inventor Cheng-An Lu
Cheng-An Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11966352Abstract: An information handling system with modular riser components for receiving expansion cards having various requirements. The system includes a riser body assembly having a common support structure for receiving expansion cards. The common support structure may be coupled to different expansion structures to provide support of expansion cards having requirements that would not be met by the common support structure alone.Type: GrantFiled: October 8, 2020Date of Patent: April 23, 2024Assignee: Dell Products L.P.Inventors: Yu-Feng Lin, Hao-Cheng Ku, Yi-Wei Lu
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Patent number: 11967596Abstract: An integrated circuit includes a first-voltage power rail and a second-voltage power rail in a first connection layer, and includes a first-voltage underlayer power rail and a second-voltage underlayer power rail below the first connection layer. Each of the first-voltage and second-voltage power rails extends in a second direction that is perpendicular to a first direction. Each of the first-voltage and second-voltage underlayer power rails extends in the first direction. The integrated circuit includes a first via-connector connecting the first-voltage power rail with the first-voltage underlayer power rail, and a second via-connector connecting the second-voltage power rail with the second-voltage underlayer power rail.Type: GrantFiled: August 5, 2021Date of Patent: April 23, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Guo-Huei Wu, Shih-Wei Peng, Wei-Cheng Lin, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien, Lee-Chung Lu
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Publication number: 20240125776Abstract: Provided herein are encoded microcarriers for analyte detection in multiplex assays. The microcarriers are encoded with an analog code for identification and comprise a capture agent for analyte detection and a substantially transparent magnetic polymer. The analog code is generated by a two-dimensional shape of a substantially non-transparent layer. Also provided are methods of making the encoded microcarriers disclosed herein. Further provided are methods and kits for conducting a multiplex assay using the microcarriers described herein.Type: ApplicationFiled: November 21, 2023Publication date: April 18, 2024Applicant: Plexbio Co., Ltd.Inventors: Dean TSAO, Chin-Shiou HUANG, Cheng-Tse LIN, Chien-Te WU, FengKan LU
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Patent number: 11963300Abstract: A panel device including a substrate, a conductor pad, a turning wire, and a circuit board is provided. The substrate has a first surface and a second surface connected to the first surface while a normal direction of the second surface is different from a normal direction of the first surface. The conductor pad is disposed on the first surface of the substrate. The turning wire is disposed on the substrate and extends from the first surface to the second surface. The turning wire includes a wiring layer in contact with the conductor pad and a wire covering layer covering the wiring layer. The circuit board is bonded to and electrically connected to the wire covering layer. A manufacturing method of a panel device is also provided herein.Type: GrantFiled: July 9, 2021Date of Patent: April 16, 2024Assignee: Au Optronics CorporationInventors: Chun-Yueh Hou, Hao-An Chuang, Fan-Yu Chen, Hsi-Hung Chen, Yun Cheng, Wen-Chang Hsieh, Chih-Wen Lu
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Patent number: 11963295Abstract: Provided are a circuit apparatus, a manufacturing method thereof, and a circuit system. The circuit apparatus includes a flexible circuit board, a flexible packaging material layer and an electronic device. The flexible circuit board has at least one hollow pattern, wherein the flexible circuit board has an inner region and a peripheral region surrounding the inner region, and has a first surface and a second surface opposite to each other. The flexible packaging material layer is disposed in the at least one hollow pattern. The electronic device is disposed on the first surface of the flexible circuit board and electrically connected with the flexible circuit board.Type: GrantFiled: January 27, 2022Date of Patent: April 16, 2024Assignee: Industrial Technology Research InstituteInventors: Hung-Hsien Ko, Yi-Cheng Lu, Heng-Yin Chen, Hao-Wei Yu, Te-Hsun Lin
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Patent number: 11961912Abstract: The present application provides a semiconductor device and the method of making the same. The method includes recessing a fin extending from a substrate, forming a base epitaxial feature on the recessed fin, forming a bar-like epitaxial feature on the base epitaxial feature, and forming a conformal epitaxial feature on the bar-like epitaxial feature. The forming of the bar-like epitaxial feature includes in-situ doping the bar-like epitaxial feature with an n-type dopant at a first doping concentration. The forming of the conformal epitaxial feature includes in-situ doping the conformal epitaxial feature with a second doping concentration greater than the first doping concentration.Type: GrantFiled: June 6, 2022Date of Patent: April 16, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chun-An Lin, Wei-Yuan Lu, Feng-Cheng Yang, Tzu-Ching Lin, Li-Li Su
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Publication number: 20240121594Abstract: A method implemented by a first network node in a communication network is provided. The method comprises: receiving a first subscription for subscribing a first User Equipment UE reachability event of a UE from an event subscriber, wherein the first subscription comprises a first indicator for indicating whether the first UE reachability event is to be reported in a direct mode or an indirect mode; sending a second subscription for subscribing a second UE reachability event to a second network node that is registered in the first network node, the second subscription comprises a second indicator for indicating that the first UE reachability event is to be directly or indirectly reported to the event subscriber according to the first indicator; and sending a first UE reachability report to the event subscriber.Type: ApplicationFiled: January 25, 2022Publication date: April 11, 2024Inventors: Emiliano Merino Vazquez, Cheng Wang, Jose Miguel Dopico Sanjuan, Yunjie Lu, Juan Manuel Fernandez Galmes
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Publication number: 20240120402Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a first dielectric feature extending along a first direction, the first dielectric feature comprising a first dielectric layer having a first sidewall and a second sidewall opposing the first sidewall, a first semiconductor layer disposed adjacent the first sidewall, the first semiconductor layer extending along a second direction perpendicular to the first direction, a second dielectric feature extending along the first direction, the second dielectric feature disposed adjacent the first semiconductor layer, and a first gate electrode layer surrounding at least three surfaces of the first semiconductor layer, and a portion of the first gate electrode layer is exposed to a first air gap.Type: ApplicationFiled: November 19, 2023Publication date: April 11, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jia-Ni YU, Kuo-Cheng CHIANG, Mao-Lin HUANG, Lung-Kun CHU, Chung-Wei HSU, Chun-Fu LU, Chih-Hao WANG, Kuan-Lun CHENG
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Patent number: 11955309Abstract: An automatic adjustment method and an automatic adjustment device of a beam of a semiconductor apparatus, and a training method of a parameter adjustment model are provided. The automatic adjustment method of the beam of the semiconductor apparatus includes the following steps. The semiconductor apparatus generates the beam. A wave curve of the beam is obtained. The wave curve is segmented into several sections. The slope of each of the sections is obtained. Several environmental factors of the semiconductor apparatus are obtained. According to the slopes and the environmental factors, at least one parameter adjustment command of the semiconductor apparatus is analyzed through the parameter adjustment model.Type: GrantFiled: July 7, 2021Date of Patent: April 9, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Zheng-Yang Li, Chian-Chen Kuo, Yi-Cheng Lu, Ji-Fu Kung
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Patent number: 11955459Abstract: A package structure is provided. The package structure includes a first die and a second die, a dielectric layer, a bridge, an encapsulant, and a redistribution layer structure. The dielectric layer is disposed on the first die and the second die. The bridge is electrically connected to the first die and the second die, wherein the dielectric layer is spaced apart from the bridge. The encapsulant is disposed on the dielectric layer and laterally encapsulating the bridge. The redistribution layer structure is disposed over the encapsulant and the bridge. A top surface of the bridge is in contact with the RDL structure.Type: GrantFiled: March 7, 2022Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shu-Hang Liao, Chih-Wei Wu, Jing-Cheng Lin, Szu-Wei Lu, Ying-Ching Shih
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Patent number: 11952676Abstract: A silicon carbide crystal includes a seed layer, a bulk layer and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer and the stress buffering structure are each formed with a dopant that cycles between high and low dopant concentration. The stress buffering structure includes a plurality of stacked buffer layers and a transition layer over the buffer layers. The buffer layer closest to the seed layer has the same variation trend of the dopant concentration as the buffer layer closest to the transition layer, and the dopant concentration of the transition layer is equal to the dopant concentration of the seed layer.Type: GrantFiled: October 16, 2020Date of Patent: April 9, 2024Assignee: GLOBALWAFERS CO., LTD.Inventors: Ching-Shan Lin, Jian-Hsin Lu, Chien-Cheng Liou, Man-Hsuan Lin
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Patent number: 11953521Abstract: Provided is a probe card, comprising a guide plate and a shielding structure of single-layer or multi-layer. The guide plate comprises an upper surface, a lower surface, and at least one guide hole passing through the upper surface and the lower surface, and the guide hole is provided with an inner wall surface. At least one layer of the shielding structure is made of an electromagnetic absorption material or an electromagnetic reflection material, and the shielding structure is not connected to a ground. Each layer of the shielding structure is formed on the inner wall surface of the guide hole by means of atomic layer deposition or atomic layer etching, and a thickness of each layer is less than 1000 nm.Type: GrantFiled: August 10, 2022Date of Patent: April 9, 2024Assignee: BAO HONG SEMI TECHNOLOGY CO., LTD.Inventors: Chao-Cheng Ting, Li-Hong Lu, Huai-Yi Wang, Lung-Chuan Tsai
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Patent number: 11955370Abstract: A system and methods of forming a dielectric material within a trench are described herein. In an embodiment of the method, the method includes introducing a first precursor into a trench of a dielectric layer, such that portions of the first precursor react with the dielectric layer and attach on sidewalls of the trench. The method further includes partially etching portions of the first precursor on the sidewalls of the trench to expose upper portions of the sidewalls of the trench. The method further includes introducing a second precursor into the trench, such that portions of the second precursor react with the remaining portions of the first precursor to form the dielectric material at the bottom of the trench.Type: GrantFiled: September 18, 2020Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Bo-Cyuan Lu, Ting-Gang Chen, Sung-En Lin, Chunyao Wang, Yung-Cheng Lu, Chi On Chui, Tai-Chun Huang, Chieh-Ping Wang
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Publication number: 20240113195Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of first nanostructures formed over a substrate, and a dielectric wall adjacent to the first nanostructures. The semiconductor structure also includes a first liner layer between the first nanostructures and the dielectric wall, and the first liner layer is in direct contact with the dielectric wall. The semiconductor structure also includes a gate structure surrounding the first nanostructures, and the first liner layer is in direct contact with a portion of the gate structure.Type: ApplicationFiled: February 22, 2023Publication date: April 4, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jia-Ni YU, Lung-Kun CHU, Chun-Fu LU, Chung-Wei HSU, Mao-Lin HUANG, Kuo-Cheng CHIANG, Chih-Hao WANG
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Patent number: 11946045Abstract: The present invention relates to variant polypeptides, methods of preparing the variant polypeptides, processes for characterizing the variant polypeptides, compositions and cells comprising the variant polypeptides, and methods of using the variant polypeptides. The invention further relates to complexes comprising the variant polypeptides, methods of producing the complexes, processes for characterizing the complexes, cells comprising the complexes, and methods of using the complexes.Type: GrantFiled: December 30, 2022Date of Patent: April 2, 2024Assignee: Arbor Biotechnologies, Inc.Inventors: Shaorong Chong, Wei-Cheng Lu, Brendan Jay Hilbert, Quinton Norman Wessells, Lauren E. Alfonse, Anthony James Garrity
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Publication number: 20240106040Abstract: A cover plate of a cylindrical battery and the cylindrical battery are provided by the present application. The cover plate of the cylindrical battery includes a pole column. A bottom of the pole column is connected with a current collecting plate. The pole column is sleeved with a sealing ring. A first insulating element and a cover slip are sequentially sleeved on an outside of the sealing ring along a vertical direction. The first insulating element insulates the current collecting plate from the cover slip.Type: ApplicationFiled: October 21, 2022Publication date: March 28, 2024Applicant: EVE POWER CO., LTD.Inventors: Haixu Lu, He Zhao, Liming Huang, Cheng Yang, Yuebin Xu, Wei He
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Publication number: 20240107001Abstract: Aspects of online camera calibration for autonomous driving systems are described herein. The aspects may include a wheel odometer configured to measure a current speed of a moving vehicle, a speed monitor configured to determine that the current speed of the moving vehicle is high or low, and a camera calibrator configured to calibrate, while the vehicle is moving, at least one front camera of the moving vehicle according to a position of a vanishing point of two lane lines when the current speed is high. When the current speed is low and the vehicle is still moving, the camera calibrator may be further configured to calibrate multiple side and rear cameras of the moving vehicle according to a pose graph that includes relative poses of the multiple side and rear cameras.Type: ApplicationFiled: September 28, 2022Publication date: March 28, 2024Inventors: Chen BAI, Cheng LU, Chengzhang ZHONG
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Patent number: 11943823Abstract: An example playback device is configured to detect an input indicating a command to power up the playback device and, based on the input, begin initialization of a wireless network interface. After beginning initialization of the wireless network interface but before the playback device is capable of establishing a connection to at least one wireless network type via the wireless network interface, the playback device causes the wireless network interface to scan for available wireless networks of the at least one wireless network type. The playback device identifies at least one available wireless network and stores an indication of the at least one available wireless network. After the playback device is capable of establishing a connection, the playback device uses the stored indication of the at least one available wireless network to establish a connection to a given wireless network of the at least one available wireless network.Type: GrantFiled: August 30, 2021Date of Patent: March 26, 2024Assignee: Sonos, Inc.Inventors: Cheng Lu, Stuart Eichert
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Patent number: 11942549Abstract: A semiconductor device and method of manufacture are provided. In embodiments a first liner is deposited to line a recess between a first semiconductor fin and a second semiconductor fin, the first liner comprising a first material. The first liner is annealed to transform the first material to a second material. A second liner is deposited to line the recess, the second liner comprising a third material. The second liner is annealed to transform the third material to a fourth material.Type: GrantFiled: December 12, 2022Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wan-Yi Kao, Yu-Cheng Shiau, Chunyao Wang, Chih-Tang Peng, Yung-Cheng Lu, Chi On Chui
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Patent number: 11942329Abstract: A method for forming a semiconductor device is provided. The method includes forming a semiconductor protruding structure over a substrate and surrounding the semiconductor protruding structure with an insulating layer. The method also includes forming a dielectric layer over the insulating layer. The method further includes partially removing the dielectric layer and insulating layer using a planarization process. As a result, topmost surfaces of the semiconductor protruding structure, the insulating layer, and the dielectric layer are substantially level with each other. In addition, the method includes forming a protective layer to cover the topmost surfaces of the dielectric layer. The method includes recessing the insulating layer after the protective layer is formed such that the semiconductor protruding structure and a portion of the dielectric layer protrude from a top surface of a remaining portion of the insulating layer.Type: GrantFiled: March 3, 2022Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wan-Yi Kao, Che-Hao Chang, Yung-Cheng Lu, Chi On Chui